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author | Thierry Reding <treding@nvidia.com> | 2015-01-08 13:24:33 +0100 |
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committer | Thierry Reding <treding@nvidia.com> | 2015-01-09 11:45:15 +0100 |
commit | 2cda1880f8c6b6a081ab78824d3742a229887b69 (patch) | |
tree | 91c638cbd3bf58518453fbcfb8fc3d281892a3f6 /arch/arm/mach-omap2/cminst44xx.c | |
parent | ARM: dts: tegra20: fix GR3D, DSI unit and reg base addresses (diff) | |
download | linux-2cda1880f8c6b6a081ab78824d3742a229887b69.tar.xz linux-2cda1880f8c6b6a081ab78824d3742a229887b69.zip |
ARM: tegra: Fix unit address for Cortex-A9 TWD timer
The Cortex-A9 TWD timer has registers at address 0x50040600, but the
unit address was 50004600, most likely a typo.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/mach-omap2/cminst44xx.c')
0 files changed, 0 insertions, 0 deletions