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| author | Vishwanath Sripathy <vishwanath.bs@ti.com> | 2012-09-25 18:33:50 +0200 |
|---|---|---|
| committer | Kevin Hilman <khilman@ti.com> | 2012-11-06 00:31:49 +0100 |
| commit | df7cded30ced539d3b4e6bae9f3011d98c069d41 (patch) | |
| tree | e2c05e13249717ea89ab668ede06d19fd0f89d48 /arch/arm/mach-omap2/control.h | |
| parent | ARM: OMAP4: TWL: enable high speed mode for PMIC communication (diff) | |
| download | linux-df7cded30ced539d3b4e6bae9f3011d98c069d41.tar.xz linux-df7cded30ced539d3b4e6bae9f3011d98c069d41.zip | |
ARM: OMAP4: OPP: add OMAP4460 definitions
Add OMAP4460 OPP definitions for voltage and frequencies based on
OMAP4460 ES1.0 DM Operating Condition Addendum Version 0.1
The following exceptions are present:
* Smartreflex support is still on experimental mode: the gains and min
limits are currently pending characterization data. Currently OMAP4430 values
are used.
* Efuse offset for core OPP100-OV setting is not clear in documentation.
* IVA OPPs beyond OPP100 are disabled due to the delta between max OMAP4460
current requirements and Phoenix Max supply on VCORE2 in the default
configuration - boards which have supply which can support this should
explicitly call opp_enable and enable the same.
* MPU OPPs > OPPTURBO can easily be detected using a efuse burnt - currently
disabled pending clock changes to support DCC feature.
[nm@ti.com: cleanups and updates from Datamanual]
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Vishwanath BS <vishwanath.bs@ti.com>
[t-kristo@ti.com: rebased to linux-3.6-rc5]
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/control.h')
| -rw-r--r-- | arch/arm/mach-omap2/control.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h index a89e8256fd0e..d236257626bf 100644 --- a/arch/arm/mach-omap2/control.h +++ b/arch/arm/mach-omap2/control.h @@ -201,6 +201,7 @@ #define OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO 0x249 #define OMAP44XX_CONTROL_FUSE_CORE_OPP50 0x254 #define OMAP44XX_CONTROL_FUSE_CORE_OPP100 0x257 +#define OMAP44XX_CONTROL_FUSE_CORE_OPP100OV 0x25A /* AM35XX only CONTROL_GENERAL register offsets */ #define AM35XX_CONTROL_MSUSPENDMUX_6 (OMAP2_CONTROL_GENERAL + 0x0038) |