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| author | R Sricharan <r.sricharan@ti.com> | 2012-04-19 14:12:19 +0200 |
|---|---|---|
| committer | Santosh Shilimkar <santosh.shilimkar@ti.com> | 2012-07-09 15:44:39 +0200 |
| commit | b13e80a8bfe442406495a2fc9e7cbb79d33df48a (patch) | |
| tree | 96158952517112c0fc77470af9e049a57453878d /arch/arm/mach-omap2/control.h | |
| parent | ARM: OMAP: counter-32k: Select the CR register offset using the IP scheme (diff) | |
| download | linux-b13e80a8bfe442406495a2fc9e7cbb79d33df48a.tar.xz linux-b13e80a8bfe442406495a2fc9e7cbb79d33df48a.zip | |
ARM: OMAP5: id: Add cpu id for ES versions
Adding the OMAP5 ES1.0, 2.0 and OMAP5432 cpu revision
detection support.
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/control.h')
| -rw-r--r-- | arch/arm/mach-omap2/control.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h index 295b39047a71..b8cdc8531b60 100644 --- a/arch/arm/mach-omap2/control.h +++ b/arch/arm/mach-omap2/control.h @@ -253,6 +253,10 @@ /* TI81XX CONTROL_DEVCONF register offsets */ #define TI81XX_CONTROL_DEVICE_ID (TI81XX_CONTROL_DEVCONF + 0x000) +/* OMAP54XX CONTROL STATUS register */ +#define OMAP5XXX_CONTROL_STATUS 0x134 +#define OMAP5_DEVICETYPE_MASK (0x7 << 6) + /* * REVISIT: This list of registers is not comprehensive - there are more * that should be added. |