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authorRoger Quadros <rogerq@ti.com>2016-02-23 17:37:24 +0100
committerTony Lindgren <tony@atomide.com>2016-02-26 19:32:14 +0100
commit6607fac8f45a33a2b66c64c90d7c37d39d6f0d69 (patch)
tree19e6c2ba11418e74920faa4a02b4ecea1872dd5c /arch/arm/mach-omap2/devices.c
parentARM: dts: dm816x: Fix NAND device nodes (diff)
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ARM: dts: dm8168-evm: ARM: dts: Disable wait pin monitoring for NAND
The NAND Ready/Busy# line is connected to GPMC_WAIT0 pin and can't be used for wait state insertion for NAND I/O read/write. So disable read/write wait monitoring as per Reference Manual's suggestion [1]. [1] dm816x TRM: SPRUGX8C: 9.2.4.12.2 NAND Device-Ready Pin Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/devices.c')
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