diff options
| author | Komal Shah <komal_shah802003@yahoo.com> | 2006-09-25 11:41:39 +0200 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2006-09-25 11:41:39 +0200 |
| commit | e4d5ee8109c210b65becfc1ef7697a0ce4eaf3c4 (patch) | |
| tree | 3012d2fdbab839be8dbb6b25f536403e205d5d07 /arch/arm/mach-omap2/irq.c | |
| parent | ARM: OMAP: Reset GPIO irq state after free_irq() (diff) | |
| download | linux-e4d5ee8109c210b65becfc1ef7697a0ce4eaf3c4.tar.xz linux-e4d5ee8109c210b65becfc1ef7697a0ce4eaf3c4.zip | |
ARM: OMAP: Remove IVA IRQ bank
ARM11 can't access the IVA interrupt controller from
IVA slave port.
From Richard Woodruff:
"The 0x40000000 is an IVA-ARM7 local bus address.
The IVA-INTC is NOT accessible through the IVA-L3-Slave Port.
The current TRM does say this directly and indirectly in a few spots and
in figures."
Signed-off-by: Komal Shah <komal_shah802003@yahoo.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/irq.c')
| -rw-r--r-- | arch/arm/mach-omap2/irq.c | 12 |
1 files changed, 0 insertions, 12 deletions
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index dfc3b35cc1ff..1ed2fff4691a 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -41,18 +41,6 @@ static struct omap_irq_bank { .nr_irqs = 96, }, { /* XXX: DSP INTC */ - -#if 0 - /* - * Commented out for now until we fix the IVA clocking - */ -#ifdef CONFIG_ARCH_OMAP2420 - }, { - /* IVA INTC (2420 only) */ - .base_reg = OMAP24XX_IVA_INTC_BASE, - .nr_irqs = 16, /* Actually 32, but only 16 are used */ -#endif -#endif } }; |