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| author | Ingo Molnar <mingo@kernel.org> | 2014-05-22 10:28:56 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2014-05-22 10:28:56 +0200 |
| commit | 65c2ce70046c779974af8b5dfc25a0df489089b5 (patch) | |
| tree | b16f152eb62b71cf5a1edc51da865b357c989922 /arch/arm/mach-omap2/omap-headsmp.S | |
| parent | arm64: Remove TIF_POLLING_NRFLAG (diff) | |
| parent | Linux 3.15-rc6 (diff) | |
| download | linux-65c2ce70046c779974af8b5dfc25a0df489089b5.tar.xz linux-65c2ce70046c779974af8b5dfc25a0df489089b5.zip | |
Merge tag 'v3.15-rc6' into sched/core, to pick up the latest fixes
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/arm/mach-omap2/omap-headsmp.S')
| -rw-r--r-- | arch/arm/mach-omap2/omap-headsmp.S | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/omap-headsmp.S b/arch/arm/mach-omap2/omap-headsmp.S index 75e92952c18e..40c5d5f1451c 100644 --- a/arch/arm/mach-omap2/omap-headsmp.S +++ b/arch/arm/mach-omap2/omap-headsmp.S @@ -1,7 +1,7 @@ /* * Secondary CPU startup routine source file. * - * Copyright (C) 2009 Texas Instruments, Inc. + * Copyright (C) 2009-2014 Texas Instruments, Inc. * * Author: * Santosh Shilimkar <santosh.shilimkar@ti.com> @@ -28,9 +28,13 @@ * code. This routine also provides a holding flag into which * secondary core is held until we're ready for it to initialise. * The primary core will update this flag using a hardware -+ * register AuxCoreBoot0. + * register AuxCoreBoot0. */ ENTRY(omap5_secondary_startup) +.arm +THUMB( adr r9, BSYM(wait) ) @ CPU may be entered in ARM mode. +THUMB( bx r9 ) @ If this is a Thumb-2 kernel, +THUMB( .thumb ) @ switch to Thumb now. wait: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0 ldr r0, [r2] mov r0, r0, lsr #5 |