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authorOlof Johansson <olof@lixom.net>2016-07-06 07:22:58 +0200
committerOlof Johansson <olof@lixom.net>2016-07-06 07:22:58 +0200
commitdf92d2e39313d0af510cacef27e82be6a002b889 (patch)
tree8eae9f5680e114ec79d751331c7605e0a172323e /arch/arm/mach-omap2/omap-mpuss-lowpower.c
parentARM: oxnas: Change OX810SE default driver config (diff)
parentARM: OMAP2+: Fix build if CONFIG_SMP is not set (diff)
downloadlinux-df92d2e39313d0af510cacef27e82be6a002b889.tar.xz
linux-df92d2e39313d0af510cacef27e82be6a002b889.zip
Merge tag 'omap-for-v4.8/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
SoC related changes for omaps for v4.8 merge window: - A series of DSS platform_data fixes to prepare for DSS driver changes - Add tblck clck aliases for PWM - A series of trivial spelling corrections - Remove bogus eQEP, ePWM and eCAP hwmod entries - A series of McBSP sidetone fixes - Remove QSPI and DSS addresses from hwmod, these come from dts - Fix RSTST register offset for pruss - Make ti81xx_rtc_hwmod static - Remove wrongly defined RSTST offset for PER Domain, note that the subject for this one wrongly has "dts" in the subject - Add support for omap5 and dra7 workaround for 801819 - A series of patches to make kexec work for SMP omaps * tag 'omap-for-v4.8/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (30 commits) ARM: OMAP2+: Fix build if CONFIG_SMP is not set ARM: OMAP4+: Allow kexec on SMP variants ARM: OMAP4+: Reset CPU1 properly for kexec ARM: OMAP4+: Prevent CPU1 related hang with kexec ARM: OMAP4+: Initialize SAR RAM base early for proper CPU1 reset for kexec ARM: dts: am43xx: Remove wrongly defined RSTST offset for PER Domain ARM: OMAP: make ti81xx_rtc_hwmod static ARM: AM43XX: hwmod: Fix RSTST register offset for pruss ARM: DRA7: hwmod: remove DSS addresses from hwmod ARM: DRA7: hwmod: Remove QSPI address space entry from hwmod ARM: OMAP2+: McBSP: Remove the old iclk allow/deny idle code ASoC: omap-mcbsp: sidetone: Use the new callback for iclk handling ASoC: omap-mcbsp: Rename omap_mcbsp_sysfs_remove() to omap_mcbsp_cleanup() ARM: OMAP3: pdata-quirks: Add support for McBSP2/3 sidetone handling ARM: OMAP3: McBSP: New callback for McBSP2/3 ICLK idle configuration ARM: OMAP3: hwmod data: Fix McBSP2/3 sidetone data ARM: AM335x/AM437x: hwmod: Remove eQEP, ePWM and eCAP hwmod entries ARM: OMAP2+: Fix typo in sdrc.h ARM: OMAP2+: Fix typo in omap_device.c ARM: OMAP2+: Fix typo in omap4-common.c ... Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-omap2/omap-mpuss-lowpower.c')
-rw-r--r--arch/arm/mach-omap2/omap-mpuss-lowpower.c29
1 files changed, 25 insertions, 4 deletions
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index 65024af169d3..17515179e6ae 100644
--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -62,6 +62,8 @@
#include "prm44xx.h"
#include "prm-regbits-44xx.h"
+static void __iomem *sar_base;
+
#ifdef CONFIG_SMP
struct omap4_cpu_pm_info {
@@ -90,7 +92,6 @@ struct cpu_pm_ops {
static DEFINE_PER_CPU(struct omap4_cpu_pm_info, omap4_pm_info);
static struct powerdomain *mpuss_pd;
-static void __iomem *sar_base;
static u32 cpu_context_offset;
static int default_finish_suspend(unsigned long cpu_state)
@@ -366,9 +367,6 @@ int __init omap4_mpuss_init(void)
return -ENODEV;
}
- if (cpu_is_omap44xx())
- sar_base = omap4_get_sar_ram_base();
-
/* Initilaise per CPU PM information */
pm_info = &per_cpu(omap4_pm_info, 0x0);
if (sar_base) {
@@ -444,3 +442,26 @@ int __init omap4_mpuss_init(void)
}
#endif
+
+/*
+ * For kexec, we must set CPU1_WAKEUP_NS_PA_ADDR to point to
+ * current kernel's secondary_startup() early before
+ * clockdomains_init(). Otherwise clockdomain_init() can
+ * wake CPU1 and cause a hang.
+ */
+void __init omap4_mpuss_early_init(void)
+{
+ unsigned long startup_pa;
+
+ if (!cpu_is_omap44xx())
+ return;
+
+ sar_base = omap4_get_sar_ram_base();
+
+ if (cpu_is_omap443x())
+ startup_pa = virt_to_phys(omap4_secondary_startup);
+ else
+ startup_pa = virt_to_phys(omap4460_secondary_startup);
+
+ writel_relaxed(startup_pa, sar_base + CPU1_WAKEUP_NS_PA_ADDR_OFFSET);
+}