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author | Arnd Bergmann <arnd@arndb.de> | 2017-12-06 14:17:17 +0100 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2017-12-07 15:52:21 +0100 |
commit | 863204cfdae98626a92535ac928ad79f4d6b74ff (patch) | |
tree | e2769c379d5c934cdafb4694344f8c5a4eef64f6 /arch/arm/mach-omap2/omap-secure.c | |
parent | arm: dts: nspire: Add missing #phy-cells to usb-nop-xceiv (diff) | |
download | linux-863204cfdae98626a92535ac928ad79f4d6b74ff.tar.xz linux-863204cfdae98626a92535ac928ad79f4d6b74ff.zip |
ARM: omap2: hide omap3_save_secure_ram on non-OMAP3 builds
In configurations without CONFIG_OMAP3 but with secure RAM support,
we now run into a link failure:
arch/arm/mach-omap2/omap-secure.o: In function `omap3_save_secure_ram':
omap-secure.c:(.text+0x130): undefined reference to `save_secure_ram_context'
The omap3_save_secure_ram() function is only called from the OMAP34xx
power management code, so we can simply hide that function in the
appropriate #ifdef.
Fixes: d09220a887f7 ("ARM: OMAP2+: Fix SRAM virt to phys translation for save_secure_ram_context")
Acked-by: Tony Lindgren <tony@atomide.com>
Tested-by: Dan Murphy <dmurphy@ti.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-omap2/omap-secure.c')
-rw-r--r-- | arch/arm/mach-omap2/omap-secure.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/omap-secure.c b/arch/arm/mach-omap2/omap-secure.c index 9ff92050053c..fa7f308c9027 100644 --- a/arch/arm/mach-omap2/omap-secure.c +++ b/arch/arm/mach-omap2/omap-secure.c @@ -73,6 +73,7 @@ phys_addr_t omap_secure_ram_mempool_base(void) return omap_secure_memblock_base; } +#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM) u32 omap3_save_secure_ram(void __iomem *addr, int size) { u32 ret; @@ -91,6 +92,7 @@ u32 omap3_save_secure_ram(void __iomem *addr, int size) return ret; } +#endif /** * rx51_secure_dispatcher: Routine to dispatch secure PPA API calls |