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| author | Illia Smyrnov <illia.smyrnov@globallogic.com> | 2014-02-05 16:06:09 +0100 |
|---|---|---|
| committer | Paul Walmsley <paul@pwsan.com> | 2014-02-19 20:07:00 +0100 |
| commit | 01142519ffc0734436f26b01aeed37a915dece05 (patch) | |
| tree | c253f4a5c54949e7302f26947a09fcb2443b724b /arch/arm/mach-omap2/omap-wakeupgen.c | |
| parent | ARM: DRA7: hwmod data: correct the sysc data for spinlock (diff) | |
| download | linux-01142519ffc0734436f26b01aeed37a915dece05.tar.xz linux-01142519ffc0734436f26b01aeed37a915dece05.zip | |
ARM: OMAP4: hwmod: Fix SOFTRESET logic for OMAP4
Commit 313a76e (ARM: OMAP2+: hwmod: Fix SOFTRESET logic) introduced
softreset bit cleaning right after set one. It is caused L3 error for
OMAP4 ISS because ISS register write occurs when ISS reset process is in
progress. Avoid this situation by cleaning softreset bit later, when reset
process is successfully finished.
Signed-off-by: Illia Smyrnov <illia.smyrnov@globallogic.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/omap-wakeupgen.c')
0 files changed, 0 insertions, 0 deletions