diff options
| author | Santosh Shilimkar <santosh.shilimkar@ti.com> | 2011-01-08 22:29:09 +0100 |
|---|---|---|
| committer | Kevin Hilman <khilman@ti.com> | 2011-12-08 20:29:01 +0100 |
| commit | 5e94c6e33e7c4726ef09f46c267e9ca232c5148a (patch) | |
| tree | ea13686167925b0a3f9e67ae02817cbb6986e0fc /arch/arm/mach-omap2/omap4-sar-layout.h | |
| parent | ARM: OMAP4: PM: Add WakeupGen and secure GIC low power support (diff) | |
| download | linux-5e94c6e33e7c4726ef09f46c267e9ca232c5148a.tar.xz linux-5e94c6e33e7c4726ef09f46c267e9ca232c5148a.zip | |
ARM: OMAP4: PM: Add L2X0 cache lowpower support
When MPUSS hits off-mode, L2 cache is lost. This patch adds L2X0
necessary maintenance operations and context restoration in the
low power code.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Tested-by: Vishwanath BS <vishwanath.bs@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/omap4-sar-layout.h')
| -rw-r--r-- | arch/arm/mach-omap2/omap4-sar-layout.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/omap4-sar-layout.h b/arch/arm/mach-omap2/omap4-sar-layout.h index aa14a8dd2505..fe5b545ad443 100644 --- a/arch/arm/mach-omap2/omap4-sar-layout.h +++ b/arch/arm/mach-omap2/omap4-sar-layout.h @@ -23,6 +23,10 @@ #define SCU_OFFSET0 0xd00 #define SCU_OFFSET1 0xd04 #define OMAP_TYPE_OFFSET 0xd10 +#define L2X0_SAVE_OFFSET0 0xd14 +#define L2X0_SAVE_OFFSET1 0xd18 +#define L2X0_AUXCTRL_OFFSET 0xd1c +#define L2X0_PREFETCH_CTRL_OFFSET 0xd20 /* CPUx Wakeup Non-Secure Physical Address offsets in SAR_BANK3 */ #define CPU0_WAKEUP_NS_PA_ADDR_OFFSET 0xa04 |