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authorThara Gopinath <thara@ti.com>2010-02-24 20:05:50 +0100
committerPaul Walmsley <paul@pwsan.com>2010-02-24 20:05:50 +0100
commitcde08f81b1d7952ae00c4be2165da629ef985522 (patch)
treefa2d18f724d441054fdaff01d0a4370868b660f4 /arch/arm/mach-omap2/powerdomain.c
parentOMAP3 PM: Defining .pwrsts_logic_ret field for core power domain structure (diff)
downloadlinux-cde08f81b1d7952ae00c4be2165da629ef985522.tar.xz
linux-cde08f81b1d7952ae00c4be2165da629ef985522.zip
OMAP3 PM: Adding counters for power domain logic off and mem off during retention.
This patch adds counters to keep track of whether the powerdomain logic or software controllable memory banks are turned off when the power domain enters retention. During power domain retention if logic gets turned off, the scenario is known as Open Switch Retention. Also during retention s/w controllable memory banks of a power domain can be chosen to be kept in retention or off. This patch adds one counter per powerdomain to track the power domain logic state during retention. Number of memory bank state counters added depends on the number of software controllable memory banks of the powerdomain. To view these counters do cat ../debug/pm_debug/count Signed-off-by: Thara Gopinath <thara@ti.com> [paul@pwsan.com: conditional expressions simplified; counter increment code moved to its own function] Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/powerdomain.c')
-rw-r--r--arch/arm/mach-omap2/powerdomain.c25
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index e9eeaa4fbd47..9a0fb385622b 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -125,6 +125,10 @@ static int _pwrdm_register(struct powerdomain *pwrdm)
for (i = 0; i < PWRDM_MAX_PWRSTS; i++)
pwrdm->state_counter[i] = 0;
+ pwrdm->ret_logic_off_counter = 0;
+ for (i = 0; i < pwrdm->banks; i++)
+ pwrdm->ret_mem_off_counter[i] = 0;
+
pwrdm_wait_transition(pwrdm);
pwrdm->state = pwrdm_read_pwrst(pwrdm);
pwrdm->state_counter[pwrdm->state] = 1;
@@ -134,6 +138,25 @@ static int _pwrdm_register(struct powerdomain *pwrdm)
return 0;
}
+static void _update_logic_membank_counters(struct powerdomain *pwrdm)
+{
+ int i;
+ u8 prev_logic_pwrst, prev_mem_pwrst;
+
+ prev_logic_pwrst = pwrdm_read_prev_logic_pwrst(pwrdm);
+ if ((pwrdm->pwrsts_logic_ret == PWRSTS_OFF_RET) &&
+ (prev_logic_pwrst == PWRDM_POWER_OFF))
+ pwrdm->ret_logic_off_counter++;
+
+ for (i = 0; i < pwrdm->banks; i++) {
+ prev_mem_pwrst = pwrdm_read_prev_mem_pwrst(pwrdm, i);
+
+ if ((pwrdm->pwrsts_mem_ret[i] == PWRSTS_OFF_RET) &&
+ (prev_mem_pwrst == PWRDM_POWER_OFF))
+ pwrdm->ret_mem_off_counter[i]++;
+ }
+}
+
static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag)
{
@@ -153,6 +176,8 @@ static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag)
prev = pwrdm_read_prev_pwrst(pwrdm);
if (pwrdm->state != prev)
pwrdm->state_counter[prev]++;
+ if (prev == PWRDM_POWER_RET)
+ _update_logic_membank_counters(pwrdm);
break;
default:
return -EINVAL;