diff options
author | Jean Pihet <jean.pihet@newoldbits.com> | 2011-03-03 11:25:43 +0100 |
---|---|---|
committer | Kevin Hilman <khilman@ti.com> | 2011-03-11 16:21:44 +0100 |
commit | 5e7c58dc8d9b7f31d418cf98c6a8cad84b86f510 (patch) | |
tree | 76556b2447f39104ac9a56e9d94182d0f6fce6fb /arch/arm/mach-omap2/powerdomain.c | |
parent | OMAP4: Add IVA OPP enteries. (diff) | |
download | linux-5e7c58dc8d9b7f31d418cf98c6a8cad84b86f510.tar.xz linux-5e7c58dc8d9b7f31d418cf98c6a8cad84b86f510.zip |
perf: add OMAP support for the new power events
The patch adds the new power management trace points for
the OMAP architecture.
The trace points are for:
- default idle handler. Since the cpuidle framework is
instrumented in the generic way there is no need to
add trace points in the OMAP specific cpuidle handler;
- SoC clocks changes (enable, disable, set_rate),
- power domain states: the desired target state and -if different-
the actually hit state.
Because of the generic nature of the changes, OMAP3 and OMAP4 are supported.
Tested on OMAP3 with suspend/resume, cpuidle, basic DVFS.
Signed-off-by: Jean Pihet <j-pihet@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/powerdomain.c')
-rw-r--r-- | arch/arm/mach-omap2/powerdomain.c | 26 |
1 files changed, 23 insertions, 3 deletions
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index a11be81997c5..49c6513e90d8 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c @@ -19,12 +19,15 @@ #include <linux/list.h> #include <linux/errno.h> #include <linux/string.h> +#include <trace/events/power.h> + #include "cm2xxx_3xxx.h" #include "prcm44xx.h" #include "cm44xx.h" #include "prm2xxx_3xxx.h" #include "prm44xx.h" +#include <asm/cpu.h> #include <plat/cpu.h> #include "powerdomain.h" #include "clockdomain.h" @@ -32,6 +35,8 @@ #include "pm.h" +#define PWRDM_TRACE_STATES_FLAG (1<<31) + enum { PWRDM_STATE_NOW = 0, PWRDM_STATE_PREV, @@ -130,8 +135,7 @@ static void _update_logic_membank_counters(struct powerdomain *pwrdm) static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag) { - int prev; - int state; + int prev, state, trace_state = 0; if (pwrdm == NULL) return -EINVAL; @@ -148,6 +152,17 @@ static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag) pwrdm->state_counter[prev]++; if (prev == PWRDM_POWER_RET) _update_logic_membank_counters(pwrdm); + /* + * If the power domain did not hit the desired state, + * generate a trace event with both the desired and hit states + */ + if (state != prev) { + trace_state = (PWRDM_TRACE_STATES_FLAG | + ((state & OMAP_POWERSTATE_MASK) << 8) | + ((prev & OMAP_POWERSTATE_MASK) << 0)); + trace_power_domain_target(pwrdm->name, trace_state, + smp_processor_id()); + } break; default: return -EINVAL; @@ -406,8 +421,13 @@ int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) pr_debug("powerdomain: setting next powerstate for %s to %0x\n", pwrdm->name, pwrst); - if (arch_pwrdm && arch_pwrdm->pwrdm_set_next_pwrst) + if (arch_pwrdm && arch_pwrdm->pwrdm_set_next_pwrst) { + /* Trace the pwrdm desired target state */ + trace_power_domain_target(pwrdm->name, pwrst, + smp_processor_id()); + /* Program the pwrdm desired target state */ ret = arch_pwrdm->pwrdm_set_next_pwrst(pwrdm, pwrst); + } return ret; } |