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author | Grant Likely <grant.likely@secretlab.ca> | 2010-05-25 08:38:26 +0200 |
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committer | Grant Likely <grant.likely@secretlab.ca> | 2010-05-25 08:38:26 +0200 |
commit | b1e50ebcf24668e57f058deb48b0704b5391ed0f (patch) | |
tree | 17e1b69b249d0738317b732186340c9dd053f1a1 /arch/arm/mach-omap2/powerdomains44xx.h | |
parent | spi/davinci: Fix clock prescale factor computation (diff) | |
parent | Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/ide-2.6 (diff) | |
download | linux-b1e50ebcf24668e57f058deb48b0704b5391ed0f.tar.xz linux-b1e50ebcf24668e57f058deb48b0704b5391ed0f.zip |
Merge remote branch 'origin' into secretlab/next-spi
Diffstat (limited to 'arch/arm/mach-omap2/powerdomains44xx.h')
-rw-r--r-- | arch/arm/mach-omap2/powerdomains44xx.h | 23 |
1 files changed, 16 insertions, 7 deletions
diff --git a/arch/arm/mach-omap2/powerdomains44xx.h b/arch/arm/mach-omap2/powerdomains44xx.h index c1015147d579..c7219513472a 100644 --- a/arch/arm/mach-omap2/powerdomains44xx.h +++ b/arch/arm/mach-omap2/powerdomains44xx.h @@ -1,12 +1,12 @@ /* * OMAP4 Power domains framework * - * Copyright (C) 2009 Texas Instruments, Inc. - * Copyright (C) 2009 Nokia Corporation + * Copyright (C) 2009-2010 Texas Instruments, Inc. + * Copyright (C) 2009-2010 Nokia Corporation * * Abhijit Pagare (abhijitpagare@ti.com) * Benoit Cousson (b-cousson@ti.com) - * Paul Walmsley + * Paul Walmsley (paul@pwsan.com) * * This file is automatically generated from the OMAP hardware databases. * We respectfully ask that any modifications to this file be coordinated @@ -54,6 +54,7 @@ static struct powerdomain core_44xx_pwrdm = { [3] = PWRDM_POWER_ON, /* ducati_l2ram */ [4] = PWRDM_POWER_ON, /* ducati_unicache */ }, + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; /* gfx_44xx_pwrdm: 3D accelerator power domain */ @@ -69,6 +70,7 @@ static struct powerdomain gfx_44xx_pwrdm = { .pwrsts_mem_on = { [0] = PWRDM_POWER_ON, /* gfx_mem */ }, + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; /* abe_44xx_pwrdm: Audio back end power domain */ @@ -87,6 +89,7 @@ static struct powerdomain abe_44xx_pwrdm = { [0] = PWRDM_POWER_ON, /* aessmem */ [1] = PWRDM_POWER_ON, /* periphmem */ }, + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; /* dss_44xx_pwrdm: Display subsystem power domain */ @@ -103,6 +106,7 @@ static struct powerdomain dss_44xx_pwrdm = { .pwrsts_mem_on = { [0] = PWRDM_POWER_ON, /* dss_mem */ }, + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; /* tesla_44xx_pwrdm: Tesla processor power domain */ @@ -123,6 +127,7 @@ static struct powerdomain tesla_44xx_pwrdm = { [1] = PWRDM_POWER_ON, /* tesla_l1 */ [2] = PWRDM_POWER_ON, /* tesla_l2 */ }, + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; /* wkup_44xx_pwrdm: Wake-up power domain */ @@ -130,7 +135,7 @@ static struct powerdomain wkup_44xx_pwrdm = { .name = "wkup_pwrdm", .prcm_offs = OMAP4430_PRM_WKUP_MOD, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), - .pwrsts = PWRDM_POWER_ON, + .pwrsts = PWRSTS_ON, .banks = 1, .pwrsts_mem_ret = { [0] = PWRDM_POWER_OFF, /* wkup_bank */ @@ -143,7 +148,7 @@ static struct powerdomain wkup_44xx_pwrdm = { /* cpu0_44xx_pwrdm: MPU0 processor and Neon coprocessor power domain */ static struct powerdomain cpu0_44xx_pwrdm = { .name = "cpu0_pwrdm", - .prcm_offs = OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, + .prcm_offs = OMAP4430_PRCM_MPU_CPU0_MOD, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), .pwrsts = PWRSTS_OFF_RET_ON, .pwrsts_logic_ret = PWRSTS_OFF_RET, @@ -159,7 +164,7 @@ static struct powerdomain cpu0_44xx_pwrdm = { /* cpu1_44xx_pwrdm: MPU1 processor and Neon coprocessor power domain */ static struct powerdomain cpu1_44xx_pwrdm = { .name = "cpu1_pwrdm", - .prcm_offs = OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, + .prcm_offs = OMAP4430_PRCM_MPU_CPU1_MOD, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), .pwrsts = PWRSTS_OFF_RET_ON, .pwrsts_logic_ret = PWRSTS_OFF_RET, @@ -227,6 +232,7 @@ static struct powerdomain ivahd_44xx_pwrdm = { [2] = PWRDM_POWER_ON, /* tcm1_mem */ [3] = PWRDM_POWER_ON, /* tcm2_mem */ }, + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; /* cam_44xx_pwrdm: Camera subsystem power domain */ @@ -242,6 +248,7 @@ static struct powerdomain cam_44xx_pwrdm = { .pwrsts_mem_on = { [0] = PWRDM_POWER_ON, /* cam_mem */ }, + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; /* l3init_44xx_pwrdm: L3 initators pheripherals power domain */ @@ -258,6 +265,7 @@ static struct powerdomain l3init_44xx_pwrdm = { .pwrsts_mem_on = { [0] = PWRDM_POWER_ON, /* l3init_bank1 */ }, + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; /* l4per_44xx_pwrdm: Target peripherals power domain */ @@ -276,6 +284,7 @@ static struct powerdomain l4per_44xx_pwrdm = { [0] = PWRDM_POWER_ON, /* nonretained_bank */ [1] = PWRDM_POWER_ON, /* retained_bank */ }, + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; /* @@ -286,7 +295,7 @@ static struct powerdomain always_on_core_44xx_pwrdm = { .name = "always_on_core_pwrdm", .prcm_offs = OMAP4430_PRM_ALWAYS_ON_MOD, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), - .pwrsts = PWRDM_POWER_ON, + .pwrsts = PWRSTS_ON, }; /* cefuse_44xx_pwrdm: Customer efuse controller power domain */ |