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| author | Nishanth Menon <nm@ti.com> | 2014-06-06 08:21:51 +0200 |
|---|---|---|
| committer | Nishanth Menon <nm@ti.com> | 2014-09-08 18:22:31 +0200 |
| commit | cafc8cb5b9c84426f3aae3179a64e41d3de97c50 (patch) | |
| tree | 9d576d29cee02a0387efba886d213291e7ccb0fc /arch/arm/mach-omap2/powerdomains7xx_data.c | |
| parent | Linux 3.17-rc1 (diff) | |
| download | linux-cafc8cb5b9c84426f3aae3179a64e41d3de97c50.tar.xz linux-cafc8cb5b9c84426f3aae3179a64e41d3de97c50.zip | |
ARM: OMAP: DRA7: powerdomain data: fix powerdomain powerstate
DRA7 supports only CSWR for CPU, MPU power domains. Core power domain
supports upto INA.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/powerdomains7xx_data.c')
| -rw-r--r-- | arch/arm/mach-omap2/powerdomains7xx_data.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/mach-omap2/powerdomains7xx_data.c b/arch/arm/mach-omap2/powerdomains7xx_data.c index 48151d1cfde0..287a2037aa16 100644 --- a/arch/arm/mach-omap2/powerdomains7xx_data.c +++ b/arch/arm/mach-omap2/powerdomains7xx_data.c @@ -160,8 +160,8 @@ static struct powerdomain core_7xx_pwrdm = { .name = "core_pwrdm", .prcm_offs = DRA7XX_PRM_CORE_INST, .prcm_partition = DRA7XX_PRM_PARTITION, - .pwrsts = PWRSTS_RET_ON, - .pwrsts_logic_ret = PWRSTS_OFF_RET, + .pwrsts = PWRSTS_INA_ON, + .pwrsts_logic_ret = PWRSTS_RET, .banks = 5, .pwrsts_mem_ret = { [0] = PWRSTS_OFF_RET, /* core_nret_bank */ @@ -193,8 +193,8 @@ static struct powerdomain cpu0_7xx_pwrdm = { .name = "cpu0_pwrdm", .prcm_offs = DRA7XX_MPU_PRCM_PRM_C0_INST, .prcm_partition = DRA7XX_MPU_PRCM_PARTITION, - .pwrsts = PWRSTS_OFF_RET_ON, - .pwrsts_logic_ret = PWRSTS_OFF_RET, + .pwrsts = PWRSTS_RET_ON, + .pwrsts_logic_ret = PWRSTS_RET, .banks = 1, .pwrsts_mem_ret = { [0] = PWRSTS_OFF_RET, /* cpu0_l1 */ @@ -209,8 +209,8 @@ static struct powerdomain cpu1_7xx_pwrdm = { .name = "cpu1_pwrdm", .prcm_offs = DRA7XX_MPU_PRCM_PRM_C1_INST, .prcm_partition = DRA7XX_MPU_PRCM_PARTITION, - .pwrsts = PWRSTS_OFF_RET_ON, - .pwrsts_logic_ret = PWRSTS_OFF_RET, + .pwrsts = PWRSTS_RET_ON, + .pwrsts_logic_ret = PWRSTS_RET, .banks = 1, .pwrsts_mem_ret = { [0] = PWRSTS_OFF_RET, /* cpu1_l1 */ @@ -243,7 +243,7 @@ static struct powerdomain mpu_7xx_pwrdm = { .prcm_offs = DRA7XX_PRM_MPU_INST, .prcm_partition = DRA7XX_PRM_PARTITION, .pwrsts = PWRSTS_RET_ON, - .pwrsts_logic_ret = PWRSTS_OFF_RET, + .pwrsts_logic_ret = PWRSTS_RET, .banks = 2, .pwrsts_mem_ret = { [0] = PWRSTS_OFF_RET, /* mpu_l2 */ |