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author | Paul Walmsley <paul@pwsan.com> | 2009-07-25 03:44:03 +0200 |
---|---|---|
committer | paul <paul@twilight.(none)> | 2009-07-25 04:10:35 +0200 |
commit | 72350b29a4c0debfc27c2edbeed9b4ff3f935dd4 (patch) | |
tree | 0c4637987fdbe97bfbdab7e00031283af47aadc1 /arch/arm/mach-omap2/prcm.c | |
parent | OMAP3 SDRC: Move the clk stabilization delay to the right place (diff) | |
download | linux-72350b29a4c0debfc27c2edbeed9b4ff3f935dd4.tar.xz linux-72350b29a4c0debfc27c2edbeed9b4ff3f935dd4.zip |
OMAP2/3 clock: split, rename omap2_wait_clock_ready()
Some OMAP2/3 hardware modules have CM_IDLEST attributes that are not
handled by the current omap2_wait_clock_ready() code. In preparation
for patches that fix the unusual devices, rename the function
omap2_wait_clock_ready() to omap2_wait_module_ready() and split it
into three parts:
1. A clkops-specific companion clock return function (by default,
omap2_clk_dflt_find_companion())
2. A clkops-specific CM_IDLEST register address and bit shift return
function (by default, omap2_clk_dflt_find_idlest())
3. Code to wait for the CM to indicate that the module is ready
(omap2_cm_wait_idlest())
Clocks can now specify their own custom find_companion() and find_idlest()
functions; used in subsequent patches.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/prcm.c')
-rw-r--r-- | arch/arm/mach-omap2/prcm.c | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c index f945156d5585..ced555a4cd1a 100644 --- a/arch/arm/mach-omap2/prcm.c +++ b/arch/arm/mach-omap2/prcm.c @@ -17,6 +17,7 @@ #include <linux/init.h> #include <linux/clk.h> #include <linux/io.h> +#include <linux/delay.h> #include <mach/common.h> #include <mach/prcm.h> @@ -28,6 +29,8 @@ static void __iomem *prm_base; static void __iomem *cm_base; +#define MAX_MODULE_ENABLE_WAIT 100000 + u32 omap_prcm_get_reset_sources(void) { /* XXX This presumably needs modification for 34XX */ @@ -120,6 +123,46 @@ u32 cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx) } EXPORT_SYMBOL(cm_rmw_mod_reg_bits); +/** + * omap2_cm_wait_idlest - wait for IDLEST bit to indicate module readiness + * @reg: physical address of module IDLEST register + * @mask: value to mask against to determine if the module is active + * @name: name of the clock (for printk) + * + * Returns 1 if the module indicated readiness in time, or 0 if it + * failed to enable in roughly MAX_MODULE_ENABLE_WAIT microseconds. + */ +int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, const char *name) +{ + int i = 0; + int ena = 0; + + /* + * 24xx uses 0 to indicate not ready, and 1 to indicate ready. + * 34xx reverses this, just to keep us on our toes + */ + if (cpu_is_omap24xx()) + ena = mask; + else if (cpu_is_omap34xx()) + ena = 0; + else + BUG(); + + /* Wait for lock */ + while (((__raw_readl(reg) & mask) != ena) && + (i++ < MAX_MODULE_ENABLE_WAIT)) + udelay(1); + + if (i < MAX_MODULE_ENABLE_WAIT) + pr_debug("cm: Module associated with clock %s ready after %d " + "loops\n", name, i); + else + pr_err("cm: Module associated with clock %s didn't enable in " + "%d tries\n", name, MAX_MODULE_ENABLE_WAIT); + + return (i < MAX_MODULE_ENABLE_WAIT) ? 1 : 0; +}; + void __init omap2_set_globals_prcm(struct omap_globals *omap2_globals) { prm_base = omap2_globals->prm; |