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authorRuss Dill <Russ.Dill@ti.com>2018-05-16 17:17:00 +0200
committerTony Lindgren <tony@atomide.com>2018-05-18 15:56:26 +0200
commit485995b09b76f20daaf39d11797f4b88cc5f6fa6 (patch)
tree82bf7f88b0a1e119713b6b141cf0ea2792be2239 /arch/arm/mach-omap2/prm33xx.c
parentARM: OMAP2+: clockdomain: Inroduce cpu_pm notifiers for context save/restore (diff)
downloadlinux-485995b09b76f20daaf39d11797f4b88cc5f6fa6.tar.xz
linux-485995b09b76f20daaf39d11797f4b88cc5f6fa6.zip
ARM: OMAP2+: Add functions to save and restore powerdomain context
The powerdomain control registers are stored in the WKUP powerdomain on AM33XX/AM43XX, which is lost on RTC-only suspend and also hibernate. This adds context save and restore functions for those registers. Sometimes the powerdomain state does not need to change, perhaps we only need to change memory retention states, so make sure the restored state is different from the current state before we wait for a transition. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Russ Dill <Russ.Dill@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/prm33xx.c')
-rw-r--r--arch/arm/mach-omap2/prm33xx.c31
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c
index ebaf80d72a10..d5141669c28d 100644
--- a/arch/arm/mach-omap2/prm33xx.c
+++ b/arch/arm/mach-omap2/prm33xx.c
@@ -342,6 +342,35 @@ static void am33xx_prm_global_warm_sw_reset(void)
AM33XX_PRM_RSTCTRL_OFFSET);
}
+static void am33xx_pwrdm_save_context(struct powerdomain *pwrdm)
+{
+ pwrdm->context = am33xx_prm_read_reg(pwrdm->prcm_offs,
+ pwrdm->pwrstctrl_offs);
+ /*
+ * Do not save LOWPOWERSTATECHANGE, writing a 1 indicates a request,
+ * reading back a 1 indicates a request in progress.
+ */
+ pwrdm->context &= ~AM33XX_LOWPOWERSTATECHANGE_MASK;
+}
+
+static void am33xx_pwrdm_restore_context(struct powerdomain *pwrdm)
+{
+ int st, ctrl;
+
+ st = am33xx_prm_read_reg(pwrdm->prcm_offs,
+ pwrdm->pwrstst_offs);
+
+ am33xx_prm_write_reg(pwrdm->context, pwrdm->prcm_offs,
+ pwrdm->pwrstctrl_offs);
+
+ /* Make sure we only wait for a transition if there is one */
+ st &= OMAP_POWERSTATEST_MASK;
+ ctrl = OMAP_POWERSTATEST_MASK & pwrdm->context;
+
+ if (st != ctrl)
+ am33xx_pwrdm_wait_transition(pwrdm);
+}
+
struct pwrdm_ops am33xx_pwrdm_operations = {
.pwrdm_set_next_pwrst = am33xx_pwrdm_set_next_pwrst,
.pwrdm_read_next_pwrst = am33xx_pwrdm_read_next_pwrst,
@@ -357,6 +386,8 @@ struct pwrdm_ops am33xx_pwrdm_operations = {
.pwrdm_set_mem_retst = am33xx_pwrdm_set_mem_retst,
.pwrdm_wait_transition = am33xx_pwrdm_wait_transition,
.pwrdm_has_voltdm = am33xx_check_vcvp,
+ .pwrdm_save_context = am33xx_pwrdm_save_context,
+ .pwrdm_restore_context = am33xx_pwrdm_restore_context,
};
static struct prm_ll_data am33xx_prm_ll_data = {