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author | Paul Walmsley <paul@pwsan.com> | 2012-10-21 09:01:13 +0200 |
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committer | Paul Walmsley <paul@pwsan.com> | 2012-10-21 09:01:13 +0200 |
commit | 2bb2a5d30abb0dc99d074877bfad2056142c730b (patch) | |
tree | 6da1f32009cec6777baa0a474f7c2579cc57a6bc /arch/arm/mach-omap2/prm44xx.c | |
parent | ARM: OMAP1: create read_reset_sources() function (for initial use by watchdog) (diff) | |
download | linux-2bb2a5d30abb0dc99d074877bfad2056142c730b.tar.xz linux-2bb2a5d30abb0dc99d074877bfad2056142c730b.zip |
ARM: OMAP2+: PRM: create PRM reset source API for the watchdog timer driver
The OMAP watchdog timer driver needs to determine what caused the SoC
to reset for its GETBOOTSTATUS ioctl. So, define a set of standard
reset sources across OMAP SoCs. For OMAP2xxx, 3xxx, and 4xxx SoCs,
define mappings from the SoC-specific reset source register bits to
the standardized reset source IDs. Create SoC-specific PRM functions
that read the appropriate per-SoC register and use the mapping to
return the standardized reset bits. Register the SoC-specific PRM
functions with the common PRM code via prm_register(). Create a
function in the common PRM code, prm_read_reset_sources(), that
calls the SoC-specific function, registered during boot.
This patch does not yet handle some SoCs, such as AM33xx. Those SoCs
were not handled by the code this will replace.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/prm44xx.c')
-rw-r--r-- | arch/arm/mach-omap2/prm44xx.c | 83 |
1 files changed, 80 insertions, 3 deletions
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index 48d91930796d..a799e9552fbf 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -1,7 +1,7 @@ /* * OMAP4 PRM module functions * - * Copyright (C) 2011 Texas Instruments, Inc. + * Copyright (C) 2011-2012 Texas Instruments, Inc. * Copyright (C) 2010 Nokia Corporation * BenoƮt Cousson * Paul Walmsley @@ -30,6 +30,8 @@ #include "prminst44xx.h" #include "powerdomain.h" +/* Static data */ + static const struct omap_prcm_irq omap4_prcm_irqs[] = { OMAP_PRCM_IRQ("wkup", 0, 0), OMAP_PRCM_IRQ("io", 9, 1), @@ -48,6 +50,33 @@ static struct omap_prcm_irq_setup omap4_prcm_irq_setup = { .restore_irqen = &omap44xx_prm_restore_irqen, }; +/* + * omap44xx_prm_reset_src_map - map from bits in the PRM_RSTST + * hardware register (which are specific to OMAP44xx SoCs) to reset + * source ID bit shifts (which is an OMAP SoC-independent + * enumeration) + */ +static struct prm_reset_src_map omap44xx_prm_reset_src_map[] = { + { OMAP4430_RST_GLOBAL_WARM_SW_SHIFT, + OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT }, + { OMAP4430_RST_GLOBAL_COLD_SW_SHIFT, + OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT }, + { OMAP4430_MPU_SECURITY_VIOL_RST_SHIFT, + OMAP_SECU_VIOL_RST_SRC_ID_SHIFT }, + { OMAP4430_MPU_WDT_RST_SHIFT, OMAP_MPU_WD_RST_SRC_ID_SHIFT }, + { OMAP4430_SECURE_WDT_RST_SHIFT, OMAP_SECU_WD_RST_SRC_ID_SHIFT }, + { OMAP4430_EXTERNAL_WARM_RST_SHIFT, OMAP_EXTWARM_RST_SRC_ID_SHIFT }, + { OMAP4430_VDD_MPU_VOLT_MGR_RST_SHIFT, + OMAP_VDD_MPU_VM_RST_SRC_ID_SHIFT }, + { OMAP4430_VDD_IVA_VOLT_MGR_RST_SHIFT, + OMAP_VDD_IVA_VM_RST_SRC_ID_SHIFT }, + { OMAP4430_VDD_CORE_VOLT_MGR_RST_SHIFT, + OMAP_VDD_CORE_VM_RST_SRC_ID_SHIFT }, + { OMAP4430_ICEPICK_RST_SHIFT, OMAP_ICEPICK_RST_SRC_ID_SHIFT }, + { OMAP4430_C2C_RST_SHIFT, OMAP_C2C_RST_SRC_ID_SHIFT }, + { -1, -1 }, +}; + /* PRM low-level functions */ /* Read a register in a CM/PRM instance in the PRM module */ @@ -293,6 +322,31 @@ static void __init omap44xx_prm_enable_io_wakeup(void) OMAP4_PRM_IO_PMCTRL_OFFSET); } +/** + * omap44xx_prm_read_reset_sources - return the last SoC reset source + * + * Return a u32 representing the last reset sources of the SoC. The + * returned reset source bits are standardized across OMAP SoCs. + */ +static u32 omap44xx_prm_read_reset_sources(void) +{ + struct prm_reset_src_map *p; + u32 r = 0; + u32 v; + + v = omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST, + OMAP4_RM_RSTST); + + p = omap44xx_prm_reset_src_map; + while (p->reg_shift >= 0 && p->std_shift >= 0) { + if (v & (1 << p->reg_shift)) + r |= 1 << p->std_shift; + p++; + } + + return r; +} + /* Powerdomain low-level functions */ static int omap4_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) @@ -555,14 +609,37 @@ struct pwrdm_ops omap4_pwrdm_operations = { .pwrdm_wait_transition = omap4_pwrdm_wait_transition, }; +/* + * XXX document + */ +static struct prm_ll_data omap44xx_prm_ll_data = { + .read_reset_sources = &omap44xx_prm_read_reset_sources, +}; -static int __init omap4xxx_prm_init(void) +static int __init omap44xx_prm_init(void) { + int ret; + if (!cpu_is_omap44xx()) return 0; + ret = prm_register(&omap44xx_prm_ll_data); + if (ret) + return ret; + omap44xx_prm_enable_io_wakeup(); return omap_prcm_register_chain_handler(&omap4_prcm_irq_setup); } -subsys_initcall(omap4xxx_prm_init); +subsys_initcall(omap44xx_prm_init); + +static void __exit omap44xx_prm_exit(void) +{ + if (!cpu_is_omap44xx()) + return; + + /* Should never happen */ + WARN(prm_unregister(&omap44xx_prm_ll_data), + "%s: prm_ll_data function pointer mismatch\n", __func__); +} +__exitcall(omap44xx_prm_exit); |