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| author | Thomas Gleixner <tglx@linutronix.de> | 2010-02-17 18:27:37 +0100 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2010-02-17 18:28:05 +0100 |
| commit | b7e56edba4b02f2079042c326a8cd72a44635817 (patch) | |
| tree | b5042002e9747cd8fb1278d61f86d8b92a74c018 /arch/arm/mach-omap2/sdrc.h | |
| parent | x86: Use the generic page_is_ram() (diff) | |
| parent | Merge git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty-2.6 (diff) | |
| download | linux-b7e56edba4b02f2079042c326a8cd72a44635817.tar.xz linux-b7e56edba4b02f2079042c326a8cd72a44635817.zip | |
Merge branch 'linus' into x86/mm
x86/mm is on 32-rc4 and missing the spinlock namespace changes which
are needed for further commits into this topic.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/arm/mach-omap2/sdrc.h')
| -rw-r--r-- | arch/arm/mach-omap2/sdrc.h | 30 |
1 files changed, 26 insertions, 4 deletions
diff --git a/arch/arm/mach-omap2/sdrc.h b/arch/arm/mach-omap2/sdrc.h index 0837eda5f2b6..68f57bb67fc5 100644 --- a/arch/arm/mach-omap2/sdrc.h +++ b/arch/arm/mach-omap2/sdrc.h @@ -15,9 +15,12 @@ */ #undef DEBUG -#include <mach/sdrc.h> +#include <plat/sdrc.h> #ifndef __ASSEMBLER__ + +#include <linux/io.h> + extern void __iomem *omap2_sdrc_base; extern void __iomem *omap2_sms_base; @@ -48,9 +51,28 @@ static inline u32 sms_read_reg(u16 reg) return __raw_readl(OMAP_SMS_REGADDR(reg)); } #else -#define OMAP242X_SDRC_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP2420_SDRC_BASE + (reg)) -#define OMAP243X_SDRC_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP243X_SDRC_BASE + (reg)) -#define OMAP34XX_SDRC_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP343X_SDRC_BASE + (reg)) +#define OMAP242X_SDRC_REGADDR(reg) \ + OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE + (reg)) +#define OMAP243X_SDRC_REGADDR(reg) \ + OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE + (reg)) +#define OMAP34XX_SDRC_REGADDR(reg) \ + OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE + (reg)) #endif /* __ASSEMBLER__ */ +/* Minimum frequency that the SDRC DLL can lock at */ +#define MIN_SDRC_DLL_LOCK_FREQ 83000000 + +/* Scale factor for fixed-point arith in omap3_core_dpll_m2_set_rate() */ +#define SDRC_MPURATE_SCALE 8 + +/* 2^SDRC_MPURATE_BASE_SHIFT: MPU MHz that SDRC_MPURATE_LOOPS is defined for */ +#define SDRC_MPURATE_BASE_SHIFT 9 + +/* + * SDRC_MPURATE_LOOPS: Number of MPU loops to execute at + * 2^MPURATE_BASE_SHIFT MHz for SDRC to stabilize + */ +#define SDRC_MPURATE_LOOPS 96 + + #endif |