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authorPaul Walmsley <paul@pwsan.com>2009-01-28 03:12:57 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-02-08 18:50:25 +0100
commit207233533dd197457634810c6dc1b5d65ab6b8c7 (patch)
tree89b38f477d7da4b96f1746d5425dc849f9408f80 /arch/arm/mach-omap2
parent[ARM] OMAP24xx clock: add missing SSI L4 interface clock (diff)
downloadlinux-207233533dd197457634810c6dc1b5d65ab6b8c7.tar.xz
linux-207233533dd197457634810c6dc1b5d65ab6b8c7.zip
[ARM] OMAP3: move USBHOST SAR handling from clock framework to powerdomain layer
Remove usbhost_sar_fclk from the OMAP3 clock framework. The bit that the clock was tweaking doesn't actually enable or disable a clock; it controls whether the hardware will save and restore USBHOST state when the powerdomain changes state. (That happens to coincidentally enable a clock for the duration of the operation, hence the earlier confusion.) In place of the clock, mark the USBHOST powerdomain as supporting hardware save-and-restore functionality. linux-omap source commit is f3ceac86a9d425d101d606d87a5af44afef27179. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r--arch/arm/mach-omap2/clock34xx.c1
-rw-r--r--arch/arm/mach-omap2/clock34xx.h11
-rw-r--r--arch/arm/mach-omap2/powerdomains34xx.h1
3 files changed, 1 insertions, 12 deletions
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 943ac63fc6f8..439a66918d38 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -209,7 +209,6 @@ static struct omap_clk omap34xx_clks[] = {
CLK(NULL, "usbhost_120m_fck", &usbhost_120m_fck, CK_3430ES2),
CLK(NULL, "usbhost_48m_fck", &usbhost_48m_fck, CK_3430ES2),
CLK(NULL, "usbhost_ick", &usbhost_ick, CK_3430ES2),
- CLK(NULL, "usbhost_sar_fck", &usbhost_sar_fck, CK_3430ES2),
CLK(NULL, "usim_fck", &usim_fck, CK_3430ES2),
CLK(NULL, "gpt1_fck", &gpt1_fck, CK_343X),
CLK(NULL, "wkup_32k_fck", &wkup_32k_fck, CK_343X),
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index f811a0978512..a2dcf574d98a 100644
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -2218,17 +2218,6 @@ static struct clk usbhost_ick = {
.recalc = &followparent_recalc,
};
-static struct clk usbhost_sar_fck = {
- .name = "usbhost_sar_fck",
- .ops = &clkops_omap2_dflt,
- .parent = &osc_sys_ck,
- .init = &omap2_init_clk_clkdm,
- .enable_reg = OMAP_PRM_REGADDR(OMAP3430ES2_USBHOST_MOD, PM_PWSTCTRL),
- .enable_bit = OMAP3430ES2_SAVEANDRESTORE_SHIFT,
- .clkdm_name = "usbhost_clkdm",
- .recalc = &followparent_recalc,
-};
-
/* WKUP */
static const struct clksel_rate usim_96m_rates[] = {
diff --git a/arch/arm/mach-omap2/powerdomains34xx.h b/arch/arm/mach-omap2/powerdomains34xx.h
index f573f7108398..3a8e4fbea5f2 100644
--- a/arch/arm/mach-omap2/powerdomains34xx.h
+++ b/arch/arm/mach-omap2/powerdomains34xx.h
@@ -312,6 +312,7 @@ static struct powerdomain usbhost_pwrdm = {
.sleepdep_srcs = dss_per_usbhost_sleepdeps,
.pwrsts = PWRSTS_OFF_RET_ON,
.pwrsts_logic_ret = PWRDM_POWER_RET,
+ .flags = PWRDM_HAS_HDWR_SAR, /* for USBHOST ctrlr only */
.banks = 1,
.pwrsts_mem_ret = {
[0] = PWRDM_POWER_RET, /* MEMRETSTATE */