diff options
| author | Ingo Molnar <mingo@kernel.org> | 2015-05-08 13:33:33 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2015-05-08 13:33:33 +0200 |
| commit | 7ae383be81781c5e1347f71c3eb0d53ce5188200 (patch) | |
| tree | d2dfedb78cf4ee2bc9cc460af3be106b08e01050 /arch/arm/mach-omap2 | |
| parent | x86: Force inlining of atomic ops (diff) | |
| parent | Merge tag 'pm+acpi-4.1-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/... (diff) | |
| download | linux-7ae383be81781c5e1347f71c3eb0d53ce5188200.tar.xz linux-7ae383be81781c5e1347f71c3eb0d53ce5188200.zip | |
Merge branch 'linus' into x86/asm, before applying dependent patch
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/arm/mach-omap2')
64 files changed, 1156 insertions, 2218 deletions
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 2b8e47788062..6468f15f060c 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -69,6 +69,7 @@ config SOC_DRA7XX select ARM_GIC select HAVE_ARM_ARCH_TIMER select IRQ_CROSSBAR + select ARM_ERRATA_798181 if SMP config ARCH_OMAP2PLUS bool @@ -80,6 +81,7 @@ config ARCH_OMAP2PLUS select GENERIC_IRQ_CHIP select MACH_OMAP_GENERIC select MEMORY + select MFD_SYSCON select OMAP_DM_TIMER select OMAP_GPMC select PINCTRL @@ -175,12 +177,6 @@ config MACH_OMAP3_BEAGLE default y select OMAP_PACKAGE_CBB -config MACH_DEVKIT8000 - bool "DEVKIT8000 board" - depends on ARCH_OMAP3 - default y - select OMAP_PACKAGE_CUS - config MACH_OMAP_LDP bool "OMAP3 LDP board" depends on ARCH_OMAP3 @@ -225,12 +221,6 @@ config MACH_OMAP3_PANDORA select OMAP_PACKAGE_CBB select REGULATOR_FIXED_VOLTAGE if REGULATOR -config MACH_TOUCHBOOK - bool "OMAP3 Touch Book" - depends on ARCH_OMAP3 - default y - select OMAP_PACKAGE_CBB - config MACH_NOKIA_N810 bool @@ -260,12 +250,6 @@ config MACH_CM_T35 config MACH_CM_T3730 bool -config MACH_SBC3530 - bool "OMAP3 SBC STALKER board" - depends on ARCH_OMAP3 - default y - select OMAP_PACKAGE_CUS - config OMAP3_SDRC_AC_TIMING bool "Enable SDRC AC timing register changes" depends on ARCH_OMAP3 @@ -278,27 +262,6 @@ config OMAP3_SDRC_AC_TIMING wish to say no. Selecting yes without understanding what is going on could result in system crashes; -config OMAP4_ERRATA_I688 - bool "OMAP4 errata: Async Bridge Corruption" - depends on (ARCH_OMAP4 || SOC_OMAP5) && !ARCH_MULTIPLATFORM - select ARCH_HAS_BARRIERS - help - If a data is stalled inside asynchronous bridge because of back - pressure, it may be accepted multiple times, creating pointer - misalignment that will corrupt next transfers on that data path - until next reset of the system (No recovery procedure once the - issue is hit, the path remains consistently broken). Async bridge - can be found on path between MPU to EMIF and MPU to L3 interconnect. - This situation can happen only when the idle is initiated by a - Master Request Disconnection (which is trigged by software when - executing WFI on CPU). - The work-around for this errata needs all the initiators connected - through async bridge must ensure that data path is properly drained - before issuing WFI. This condition will be met if one Strongly ordered - access is performed to the target right before executing the WFI. - In MPU case, L3 T2ASYNC FIFO and DDR T2ASYNC FIFO needs to be drained. - IO barrier ensure that there is no synchronisation loss on initiators - operating on both interconnect port simultaneously. endmenu endif diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index b83f18fcec9b..ec002bd4af77 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -243,7 +243,6 @@ obj-$(CONFIG_SOC_OMAP2420) += msdi.o # Specific board support obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o pdata-quirks.o obj-$(CONFIG_MACH_OMAP3_BEAGLE) += board-omap3beagle.o -obj-$(CONFIG_MACH_DEVKIT8000) += board-devkit8000.o obj-$(CONFIG_MACH_OMAP_LDP) += board-ldp.o obj-$(CONFIG_MACH_OMAP3530_LV_SOM) += board-omap3logic.o obj-$(CONFIG_MACH_OMAP3_TORPEDO) += board-omap3logic.o @@ -254,9 +253,6 @@ obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o sdram-nokia.o obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51-peripherals.o obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51-video.o obj-$(CONFIG_MACH_CM_T35) += board-cm-t35.o -obj-$(CONFIG_MACH_TOUCHBOOK) += board-omap3touchbook.o - -obj-$(CONFIG_MACH_SBC3530) += board-omap3stalker.o # Platform specific device init code diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c index 91738a14ecbe..b5dfbc1b1fc6 100644 --- a/arch/arm/mach-omap2/board-cm-t35.c +++ b/arch/arm/mach-omap2/board-cm-t35.c @@ -492,51 +492,36 @@ static struct twl4030_platform_data cm_t35_twldata = { #include <media/omap3isp.h> #include "devices.h" -static struct i2c_board_info cm_t35_isp_i2c_boardinfo[] = { +static struct isp_platform_subdev cm_t35_isp_subdevs[] = { { - I2C_BOARD_INFO("mt9t001", 0x5d), - }, - { - I2C_BOARD_INFO("tvp5150", 0x5c), - }, -}; - -static struct isp_subdev_i2c_board_info cm_t35_isp_primary_subdevs[] = { - { - .board_info = &cm_t35_isp_i2c_boardinfo[0], - .i2c_adapter_id = 3, - }, - { NULL, 0, }, -}; - -static struct isp_subdev_i2c_board_info cm_t35_isp_secondary_subdevs[] = { - { - .board_info = &cm_t35_isp_i2c_boardinfo[1], + .board_info = &(struct i2c_board_info){ + I2C_BOARD_INFO("mt9t001", 0x5d) + }, .i2c_adapter_id = 3, - }, - { NULL, 0, }, -}; - -static struct isp_v4l2_subdevs_group cm_t35_isp_subdevs[] = { - { - .subdevs = cm_t35_isp_primary_subdevs, - .interface = ISP_INTERFACE_PARALLEL, - .bus = { - .parallel = { - .clk_pol = 1, + .bus = &(struct isp_bus_cfg){ + .interface = ISP_INTERFACE_PARALLEL, + .bus = { + .parallel = { + .clk_pol = 1, + }, }, }, }, { - .subdevs = cm_t35_isp_secondary_subdevs, - .interface = ISP_INTERFACE_PARALLEL, - .bus = { - .parallel = { - .clk_pol = 0, + .board_info = &(struct i2c_board_info){ + I2C_BOARD_INFO("tvp5150", 0x5c), + }, + .i2c_adapter_id = 3, + .bus = &(struct isp_bus_cfg){ + .interface = ISP_INTERFACE_PARALLEL, + .bus = { + .parallel = { + .clk_pol = 0, + }, }, }, }, - { NULL, 0, }, + { 0 }, }; static struct isp_platform_data cm_t35_isp_pdata = { diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c deleted file mode 100644 index d8e4f346936a..000000000000 --- a/arch/arm/mach-omap2/board-devkit8000.c +++ /dev/null @@ -1,654 +0,0 @@ -/* - * board-devkit8000.c - TimLL Devkit8000 - * - * Copyright (C) 2009 Kim Botherway - * Copyright (C) 2010 Thomas Weber - * - * Modified from mach-omap2/board-omap3beagle.c - * - * Initial code: Syed Mohammed Khasim - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/err.h> -#include <linux/clk.h> -#include <linux/io.h> -#include <linux/leds.h> -#include <linux/gpio.h> -#include <linux/input.h> -#include <linux/gpio_keys.h> - -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/mtd/nand.h> -#include <linux/mmc/host.h> -#include <linux/usb/phy.h> - -#include <linux/regulator/machine.h> -#include <linux/i2c/twl.h> -#include "id.h" -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/flash.h> - -#include "common.h" -#include "gpmc.h" -#include <linux/platform_data/mtd-nand-omap2.h> -#include <video/omapdss.h> -#include <video/omap-panel-data.h> - -#include <linux/platform_data/spi-omap2-mcspi.h> -#include <linux/input/matrix_keypad.h> -#include <linux/spi/spi.h> -#include <linux/dm9000.h> -#include <linux/interrupt.h> - -#include "sdram-micron-mt46h32m32lf-6.h" -#include "mux.h" -#include "hsmmc.h" -#include "board-flash.h" -#include "common-board-devices.h" - -#define NAND_CS 0 - -#define OMAP_DM9000_GPIO_IRQ 25 -#define OMAP3_DEVKIT_TS_GPIO 27 - -static struct mtd_partition devkit8000_nand_partitions[] = { - /* All the partition sizes are listed in terms of NAND block size */ - { - .name = "X-Loader", - .offset = 0, - .size = 4 * NAND_BLOCK_SIZE, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - { - .name = "U-Boot", - .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */ - .size = 15 * NAND_BLOCK_SIZE, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - { - .name = "U-Boot Env", - .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */ - .size = 1 * NAND_BLOCK_SIZE, - }, - { - .name = "Kernel", - .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */ - .size = 32 * NAND_BLOCK_SIZE, - }, - { - .name = "File System", - .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */ - .size = MTDPART_SIZ_FULL, - }, -}; - -static struct omap2_hsmmc_info mmc[] = { - { - .mmc = 1, - .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, - .gpio_wp = 29, - .deferred = true, - }, - {} /* Terminator */ -}; - -static struct regulator_consumer_supply devkit8000_vmmc1_supply[] = { - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), -}; - -/* ads7846 on SPI */ -static struct regulator_consumer_supply devkit8000_vio_supply[] = { - REGULATOR_SUPPLY("vcc", "spi2.0"), -}; - -static const struct display_timing devkit8000_lcd_videomode = { - .pixelclock = { 0, 40000000, 0 }, - - .hactive = { 0, 800, 0 }, - .hfront_porch = { 0, 1, 0 }, - .hback_porch = { 0, 1, 0 }, - .hsync_len = { 0, 48, 0 }, - - .vactive = { 0, 480, 0 }, - .vfront_porch = { 0, 12, 0 }, - .vback_porch = { 0, 25, 0 }, - .vsync_len = { 0, 3, 0 }, - - .flags = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW | - DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_POSEDGE, -}; - -static struct panel_dpi_platform_data devkit8000_lcd_pdata = { - .name = "lcd", - .source = "dpi.0", - - .data_lines = 24, - - .display_timing = &devkit8000_lcd_videomode, - - .enable_gpio = -1, /* filled in code */ - .backlight_gpio = -1, -}; - -static struct platform_device devkit8000_lcd_device = { - .name = "panel-dpi", - .id = 0, - .dev.platform_data = &devkit8000_lcd_pdata, -}; - -static struct connector_dvi_platform_data devkit8000_dvi_connector_pdata = { - .name = "dvi", - .source = "tfp410.0", - .i2c_bus_num = 1, -}; - -static struct platform_device devkit8000_dvi_connector_device = { - .name = "connector-dvi", - .id = 0, - .dev.platform_data = &devkit8000_dvi_connector_pdata, -}; - -static struct encoder_tfp410_platform_data devkit8000_tfp410_pdata = { - .name = "tfp410.0", - .source = "dpi.0", - .data_lines = 24, - .power_down_gpio = -1, /* filled in code */ -}; - -static struct platform_device devkit8000_tfp410_device = { - .name = "tfp410", - .id = 0, - .dev.platform_data = &devkit8000_tfp410_pdata, -}; - -static struct connector_atv_platform_data devkit8000_tv_pdata = { - .name = "tv", - .source = "venc.0", - .connector_type = OMAP_DSS_VENC_TYPE_SVIDEO, - .invert_polarity = false, -}; - -static struct platform_device devkit8000_tv_connector_device = { - .name = "connector-analog-tv", - .id = 0, - .dev.platform_data = &devkit8000_tv_pdata, -}; - -static struct omap_dss_board_info devkit8000_dss_data = { - .default_display_name = "lcd", -}; - -static uint32_t board_keymap[] = { - KEY(0, 0, KEY_1), - KEY(1, 0, KEY_2), - KEY(2, 0, KEY_3), - KEY(0, 1, KEY_4), - KEY(1, 1, KEY_5), - KEY(2, 1, KEY_6), - KEY(3, 1, KEY_F5), - KEY(0, 2, KEY_7), - KEY(1, 2, KEY_8), - KEY(2, 2, KEY_9), - KEY(3, 2, KEY_F6), - KEY(0, 3, KEY_F7), - KEY(1, 3, KEY_0), - KEY(2, 3, KEY_F8), - PERSISTENT_KEY(4, 5), - KEY(4, 4, KEY_VOLUMEUP), - KEY(5, 5, KEY_VOLUMEDOWN), - 0 -}; - -static struct matrix_keymap_data board_map_data = { - .keymap = board_keymap, - .keymap_size = ARRAY_SIZE(board_keymap), -}; - -static struct twl4030_keypad_data devkit8000_kp_data = { - .keymap_data = &board_map_data, - .rows = 6, - .cols = 6, - .rep = 1, -}; - -static struct gpio_led gpio_leds[]; - -static int devkit8000_twl_gpio_setup(struct device *dev, - unsigned gpio, unsigned ngpio) -{ - /* gpio + 0 is "mmc0_cd" (input/IRQ) */ - mmc[0].gpio_cd = gpio + 0; - omap_hsmmc_late_init(mmc); - - /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ - gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; - - /* TWL4030_GPIO_MAX + 0 is "LCD_PWREN" (out, active high) */ - devkit8000_lcd_pdata.enable_gpio = gpio + TWL4030_GPIO_MAX + 0; - - /* gpio + 7 is "DVI_PD" (out, active low) */ - devkit8000_tfp410_pdata.power_down_gpio = gpio + 7; - - return 0; -} - -static struct twl4030_gpio_platform_data devkit8000_gpio_data = { - .use_leds = true, - .pulldowns = BIT(1) | BIT(2) | BIT(6) | BIT(8) | BIT(13) - | BIT(15) | BIT(16) | BIT(17), - .setup = devkit8000_twl_gpio_setup, -}; - -static struct regulator_consumer_supply devkit8000_vpll1_supplies[] = { - REGULATOR_SUPPLY("vdds_dsi", "omapdss"), - REGULATOR_SUPPLY("vdds_dsi", "omapdss_dpi.0"), - REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.0"), -}; - -/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ -static struct regulator_init_data devkit8000_vmmc1 = { - .constraints = { - .min_uV = 1850000, - .max_uV = 3150000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(devkit8000_vmmc1_supply), - .consumer_supplies = devkit8000_vmmc1_supply, -}; - -/* VPLL1 for digital video outputs */ -static struct regulator_init_data devkit8000_vpll1 = { - .constraints = { - .min_uV = 1800000, - .max_uV = 1800000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(devkit8000_vpll1_supplies), - .consumer_supplies = devkit8000_vpll1_supplies, -}; - -/* VAUX4 for ads7846 and nubs */ -static struct regulator_init_data devkit8000_vio = { - .constraints = { - .min_uV = 1800000, - .max_uV = 1800000, - .apply_uV = true, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(devkit8000_vio_supply), - .consumer_supplies = devkit8000_vio_supply, -}; - -static struct twl4030_platform_data devkit8000_twldata = { - /* platform_data for children goes here */ - .gpio = &devkit8000_gpio_data, - .vmmc1 = &devkit8000_vmmc1, - .vpll1 = &devkit8000_vpll1, - .vio = &devkit8000_vio, - .keypad = &devkit8000_kp_data, -}; - -static int __init devkit8000_i2c_init(void) -{ - omap3_pmic_get_config(&devkit8000_twldata, - TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, - TWL_COMMON_REGULATOR_VDAC); - omap3_pmic_init("tps65930", &devkit8000_twldata); - /* Bus 3 is attached to the DVI port where devices like the pico DLP - * projector don't work reliably with 400kHz */ - omap_register_i2c_bus(3, 400, NULL, 0); - return 0; -} - -static struct gpio_led gpio_leds[] = { - { - .name = "led1", - .default_trigger = "heartbeat", - .gpio = 186, - .active_low = true, - }, - { - .name = "led2", - .default_trigger = "mmc0", - .gpio = 163, - .active_low = true, - }, - { - .name = "ledB", - .default_trigger = "none", - .gpio = 153, - .active_low = true, - }, - { - .name = "led3", - .default_trigger = "none", - .gpio = 164, - .active_low = true, - }, -}; - -static struct gpio_led_platform_data gpio_led_info = { - .leds = gpio_leds, - .num_leds = ARRAY_SIZE(gpio_leds), -}; - -static struct platform_device leds_gpio = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &gpio_led_info, - }, -}; - -static struct gpio_keys_button gpio_buttons[] = { - { - .code = BTN_EXTRA, - .gpio = 26, - .desc = "user", - .wakeup = 1, - }, -}; - -static struct gpio_keys_platform_data gpio_key_info = { - .buttons = gpio_buttons, - .nbuttons = ARRAY_SIZE(gpio_buttons), -}; - -static struct platform_device keys_gpio = { - .name = "gpio-keys", - .id = -1, - .dev = { - .platform_data = &gpio_key_info, - }, -}; - -#define OMAP_DM9000_BASE 0x2c000000 - -static struct resource omap_dm9000_resources[] = { - [0] = { - .start = OMAP_DM9000_BASE, - .end = (OMAP_DM9000_BASE + 0x4 - 1), - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = (OMAP_DM9000_BASE + 0x400), - .end = (OMAP_DM9000_BASE + 0x400 + 0x4 - 1), - .flags = IORESOURCE_MEM, - }, - [2] = { - .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, - }, -}; - -static struct dm9000_plat_data omap_dm9000_platdata = { - .flags = DM9000_PLATF_16BITONLY, -}; - -static struct platform_device omap_dm9000_dev = { - .name = "dm9000", - .id = -1, - .num_resources = ARRAY_SIZE(omap_dm9000_resources), - .resource = omap_dm9000_resources, - .dev = { - .platform_data = &omap_dm9000_platdata, - }, -}; - -static void __init omap_dm9000_init(void) -{ - unsigned char *eth_addr = omap_dm9000_platdata.dev_addr; - struct omap_die_id odi; - int ret; - - ret = gpio_request_one(OMAP_DM9000_GPIO_IRQ, GPIOF_IN, "dm9000 irq"); - if (ret < 0) { - printk(KERN_ERR "Failed to request GPIO%d for dm9000 IRQ\n", - OMAP_DM9000_GPIO_IRQ); - return; - } - - /* init the mac address using DIE id */ - omap_get_die_id(&odi); - - eth_addr[0] = 0x02; /* locally administered */ - eth_addr[1] = odi.id_1 & 0xff; - eth_addr[2] = (odi.id_0 & 0xff000000) >> 24; - eth_addr[3] = (odi.id_0 & 0x00ff0000) >> 16; - eth_addr[4] = (odi.id_0 & 0x0000ff00) >> 8; - eth_addr[5] = (odi.id_0 & 0x000000ff); -} - -static struct platform_device *devkit8000_devices[] __initdata = { - &leds_gpio, - &keys_gpio, - &omap_dm9000_dev, - &devkit8000_lcd_device, - &devkit8000_tfp410_device, - &devkit8000_dvi_connector_device, - &devkit8000_tv_connector_device, -}; - -static struct usbhs_omap_platform_data usbhs_bdata __initdata = { - .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, -}; - -#ifdef CONFIG_OMAP_MUX -static struct omap_board_mux board_mux[] __initdata = { - /* nCS and IRQ for Devkit8000 ethernet */ - OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE0), - OMAP3_MUX(ETK_D11, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP), - - /* McSPI 2*/ - OMAP3_MUX(MCSPI2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(MCSPI2_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(MCSPI2_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(MCSPI2_CS0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(MCSPI2_CS1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - - /* PENDOWN GPIO */ - OMAP3_MUX(ETK_D13, OMAP_MUX_MODE4 | OMAP_PIN_INPUT), - - /* mUSB */ - OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - - /* USB 1 */ - OMAP3_MUX(ETK_CTL, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), - OMAP3_MUX(ETK_CLK, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT), - OMAP3_MUX(ETK_D8, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), - OMAP3_MUX(ETK_D9, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), - OMAP3_MUX(ETK_D0, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), - OMAP3_MUX(ETK_D1, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), - OMAP3_MUX(ETK_D2, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), - OMAP3_MUX(ETK_D3, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), - OMAP3_MUX(ETK_D4, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), - OMAP3_MUX(ETK_D5, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), - OMAP3_MUX(ETK_D6, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), - OMAP3_MUX(ETK_D7, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), - - /* MMC 1 */ - OMAP3_MUX(SDMMC1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(SDMMC1_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(SDMMC1_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(SDMMC1_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(SDMMC1_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(SDMMC1_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(SDMMC1_DAT4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(SDMMC1_DAT5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(SDMMC1_DAT6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(SDMMC1_DAT7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - - /* McBSP 2 */ - OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - - /* I2C 1 */ - OMAP3_MUX(I2C1_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(I2C1_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - - /* I2C 2 */ - OMAP3_MUX(I2C2_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(I2C2_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - - /* I2C 3 */ - OMAP3_MUX(I2C3_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(I2C3_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - - /* I2C 4 */ - OMAP3_MUX(I2C4_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(I2C4_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - - /* serial ports */ - OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT), - OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), - OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - - /* DSS */ - OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA20, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - - /* expansion port */ - /* McSPI 1 */ - OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN), - OMAP3_MUX(MCSPI1_CS3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN), - - /* HDQ */ - OMAP3_MUX(HDQ_SIO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - - /* McSPI4 */ - OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), - OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), - OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), - OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP), - - /* MMC 2 */ - OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT), - OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT), - OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT), - OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), - - /* I2C3 */ - OMAP3_MUX(I2C3_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(I2C3_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - - OMAP3_MUX(MCBSP1_CLKX, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), - OMAP3_MUX(MCBSP_CLKS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), - OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), - - OMAP3_MUX(GPMC_NCS7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), - OMAP3_MUX(GPMC_NCS3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), - - /* TPS IRQ */ - OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \ - OMAP_PIN_INPUT_PULLUP), - - { .reg_offset = OMAP_MUX_TERMINATOR }, -}; -#endif - -static void __init devkit8000_init(void) -{ - omap3_mux_init(board_mux, OMAP_PACKAGE_CUS); - omap_serial_init(); - omap_sdrc_init(mt46h32m32lf6_sdrc_params, - mt46h32m32lf6_sdrc_params); - - omap_dm9000_init(); - - omap_hsmmc_init(mmc); - devkit8000_i2c_init(); - omap_dm9000_resources[2].start = gpio_to_irq(OMAP_DM9000_GPIO_IRQ); - platform_add_devices(devkit8000_devices, - ARRAY_SIZE(devkit8000_devices)); - - omap_display_init(&devkit8000_dss_data); - - omap_ads7846_init(2, OMAP3_DEVKIT_TS_GPIO, 0, NULL); - - usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb"); - usb_musb_init(NULL); - usbhs_init(&usbhs_bdata); - board_nand_init(devkit8000_nand_partitions, - ARRAY_SIZE(devkit8000_nand_partitions), NAND_CS, - NAND_BUSWIDTH_16, NULL); - omap_twl4030_audio_init("omap3beagle", NULL); - - /* Ensure SDRC pins are mux'd for self-refresh */ - omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); - omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT); -} - -MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000") - .atag_offset = 0x100, - .reserve = omap_reserve, - .map_io = omap3_map_io, - .init_early = omap35xx_init_early, - .init_irq = omap3_init_irq, - .init_machine = devkit8000_init, - .init_late = omap35xx_init_late, - .init_time = omap3_secure_sync32k_timer_init, - .restart = omap3xxx_restart, -MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c deleted file mode 100644 index 6311f4b1ee44..000000000000 --- a/arch/arm/mach-omap2/board-omap3stalker.c +++ /dev/null @@ -1,433 +0,0 @@ -/* - * linux/arch/arm/mach-omap2/board-omap3evm.c - * - * Copyright (C) 2008 Guangzhou EMA-Tech - * - * Modified from mach-omap2/board-omap3evm.c - * - * Initial code: Syed Mohammed Khasim - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/err.h> -#include <linux/clk.h> -#include <linux/io.h> -#include <linux/leds.h> -#include <linux/gpio.h> -#include <linux/input.h> -#include <linux/gpio_keys.h> - -#include <linux/regulator/fixed.h> -#include <linux/regulator/machine.h> -#include <linux/i2c/twl.h> -#include <linux/mmc/host.h> -#include <linux/input/matrix_keypad.h> -#include <linux/spi/spi.h> -#include <linux/interrupt.h> -#include <linux/smsc911x.h> -#include <linux/platform_data/at24.h> -#include <linux/usb/phy.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/flash.h> - -#include "common.h" -#include "gpmc.h" -#include <linux/platform_data/mtd-nand-omap2.h> -#include <video/omapdss.h> -#include <video/omap-panel-data.h> - -#include <linux/platform_data/spi-omap2-mcspi.h> - -#include "sdram-micron-mt46h32m32lf-6.h" -#include "mux.h" -#include "hsmmc.h" -#include "common-board-devices.h" - -#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) -#include "gpmc-smsc911x.h" - -#define OMAP3STALKER_ETHR_START 0x2c000000 -#define OMAP3STALKER_ETHR_SIZE 1024 -#define OMAP3STALKER_ETHR_GPIO_IRQ 19 -#define OMAP3STALKER_SMC911X_CS 5 - -static struct omap_smsc911x_platform_data smsc911x_cfg = { - .cs = OMAP3STALKER_SMC911X_CS, - .gpio_irq = OMAP3STALKER_ETHR_GPIO_IRQ, - .gpio_reset = -EINVAL, - .flags = (SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS), -}; - -static inline void __init omap3stalker_init_eth(void) -{ - omap_mux_init_gpio(19, OMAP_PIN_INPUT_PULLUP); - gpmc_smsc911x_init(&smsc911x_cfg); -} - -#else -static inline void __init omap3stalker_init_eth(void) -{ - return; -} -#endif - -/* - * OMAP3 DSS control signals - */ - -#define DSS_ENABLE_GPIO 199 -#define LCD_PANEL_BKLIGHT_GPIO 210 -#define ENABLE_VPLL2_DEV_GRP 0xE0 - -static void __init omap3_stalker_display_init(void) -{ - return; -} -static struct connector_dvi_platform_data omap3stalker_dvi_connector_pdata = { - .name = "dvi", - .source = "tfp410.0", - .i2c_bus_num = -1, -}; - -static struct platform_device omap3stalker_dvi_connector_device = { - .name = "connector-dvi", - .id = 0, - .dev.platform_data = &omap3stalker_dvi_connector_pdata, -}; - -static struct encoder_tfp410_platform_data omap3stalker_tfp410_pdata = { - .name = "tfp410.0", - .source = "dpi.0", - .data_lines = 24, - .power_down_gpio = DSS_ENABLE_GPIO, -}; - -static struct platform_device omap3stalker_tfp410_device = { - .name = "tfp410", - .id = 0, - .dev.platform_data = &omap3stalker_tfp410_pdata, -}; - -static struct connector_atv_platform_data omap3stalker_tv_pdata = { - .name = "tv", - .source = "venc.0", - .connector_type = OMAP_DSS_VENC_TYPE_COMPOSITE, - .invert_polarity = false, -}; - -static struct platform_device omap3stalker_tv_connector_device = { - .name = "connector-analog-tv", - .id = 0, - .dev.platform_data = &omap3stalker_tv_pdata, -}; - -static struct omap_dss_board_info omap3_stalker_dss_data = { - .default_display_name = "dvi", -}; - -static struct regulator_consumer_supply omap3stalker_vmmc1_supply[] = { - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), -}; - -static struct regulator_consumer_supply omap3stalker_vsim_supply[] = { - REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), -}; - -/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ -static struct regulator_init_data omap3stalker_vmmc1 = { - .constraints = { - .min_uV = 1850000, - .max_uV = 3150000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE - | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(omap3stalker_vmmc1_supply), - .consumer_supplies = omap3stalker_vmmc1_supply, -}; - -/* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ -static struct regulator_init_data omap3stalker_vsim = { - .constraints = { - .min_uV = 1800000, - .max_uV = 3000000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE - | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(omap3stalker_vsim_supply), - .consumer_supplies = omap3stalker_vsim_supply, -}; - -static struct omap2_hsmmc_info mmc[] = { - { - .mmc = 1, - .caps = MMC_CAP_4_BIT_DATA, - .gpio_cd = -EINVAL, - .gpio_wp = 23, - .deferred = true, - }, - {} /* Terminator */ -}; - -static struct gpio_keys_button gpio_buttons[] = { - { - .code = BTN_EXTRA, - .gpio = 18, - .desc = "user", - .wakeup = 1, - }, -}; - -static struct gpio_keys_platform_data gpio_key_info = { - .buttons = gpio_buttons, - .nbuttons = ARRAY_SIZE(gpio_buttons), -}; - -static struct platform_device keys_gpio = { - .name = "gpio-keys", - .id = -1, - .dev = { - .platform_data = &gpio_key_info, - }, -}; - -static struct gpio_led gpio_leds[] = { - { - .name = "stalker:D8:usr0", - .default_trigger = "default-on", - .gpio = 126, - }, - { - .name = "stalker:D9:usr1", - .default_trigger = "default-on", - .gpio = 127, - }, - { - .name = "stalker:D3:mmc0", - .gpio = -EINVAL, /* gets replaced */ - .active_low = true, - .default_trigger = "mmc0", - }, - { - .name = "stalker:D4:heartbeat", - .gpio = -EINVAL, /* gets replaced */ - .active_low = true, - .default_trigger = "heartbeat", - }, -}; - -static struct gpio_led_platform_data gpio_led_info = { - .leds = gpio_leds, - .num_leds = ARRAY_SIZE(gpio_leds), -}; - -static struct platform_device leds_gpio = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &gpio_led_info, - }, -}; - -static int -omap3stalker_twl_gpio_setup(struct device *dev, - unsigned gpio, unsigned ngpio) -{ - /* gpio + 0 is "mmc0_cd" (input/IRQ) */ - mmc[0].gpio_cd = gpio + 0; - omap_hsmmc_late_init(mmc); - - /* - * Most GPIOs are for USB OTG. Some are mostly sent to - * the P2 connector; notably LEDA for the LCD backlight. - */ - - /* TWL4030_GPIO_MAX + 0 == ledA, LCD Backlight control */ - gpio_request_one(gpio + TWL4030_GPIO_MAX, GPIOF_OUT_INIT_LOW, - "EN_LCD_BKL"); - - /* gpio + 7 == DVI Enable */ - gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "EN_DVI"); - - /* TWL4030_GPIO_MAX + 1 == ledB (out, mmc0) */ - gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; - /* GPIO + 13 == ledsync (out, heartbeat) */ - gpio_leds[3].gpio = gpio + 13; - - platform_device_register(&leds_gpio); - return 0; -} - -static struct twl4030_gpio_platform_data omap3stalker_gpio_data = { - .use_leds = true, - .setup = omap3stalker_twl_gpio_setup, -}; - -static uint32_t board_keymap[] = { - KEY(0, 0, KEY_LEFT), - KEY(0, 1, KEY_DOWN), - KEY(0, 2, KEY_ENTER), - KEY(0, 3, KEY_M), - - KEY(1, 0, KEY_RIGHT), - KEY(1, 1, KEY_UP), - KEY(1, 2, KEY_I), - KEY(1, 3, KEY_N), - - KEY(2, 0, KEY_A), - KEY(2, 1, KEY_E), - KEY(2, 2, KEY_J), - KEY(2, 3, KEY_O), - - KEY(3, 0, KEY_B), - KEY(3, 1, KEY_F), - KEY(3, 2, KEY_K), - KEY(3, 3, KEY_P) -}; - -static struct matrix_keymap_data board_map_data = { - .keymap = board_keymap, - .keymap_size = ARRAY_SIZE(board_keymap), -}; - -static struct twl4030_keypad_data omap3stalker_kp_data = { - .keymap_data = &board_map_data, - .rows = 4, - .cols = 4, - .rep = 1, -}; - -static struct twl4030_platform_data omap3stalker_twldata = { - /* platform_data for children goes here */ - .keypad = &omap3stalker_kp_data, - .gpio = &omap3stalker_gpio_data, - .vmmc1 = &omap3stalker_vmmc1, - .vsim = &omap3stalker_vsim, -}; - -static struct at24_platform_data fram_info = { - .byte_len = (64 * 1024) / 8, - .page_size = 8192, - .flags = AT24_FLAG_ADDR16 | AT24_FLAG_IRUGO, -}; - -static struct i2c_board_info __initdata omap3stalker_i2c_boardinfo3[] = { - { - I2C_BOARD_INFO("24c64", 0x50), - .flags = I2C_CLIENT_WAKE, - .platform_data = &fram_info, - }, -}; - -static int __init omap3_stalker_i2c_init(void) -{ - omap3_pmic_get_config(&omap3stalker_twldata, - TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC | - TWL_COMMON_PDATA_AUDIO, - TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); - - omap3stalker_twldata.vdac->constraints.apply_uV = true; - omap3stalker_twldata.vpll2->constraints.apply_uV = true; - omap3stalker_twldata.vpll2->constraints.name = "VDVI"; - - omap3_pmic_init("twl4030", &omap3stalker_twldata); - omap_register_i2c_bus(2, 400, NULL, 0); - omap_register_i2c_bus(3, 400, omap3stalker_i2c_boardinfo3, - ARRAY_SIZE(omap3stalker_i2c_boardinfo3)); - return 0; -} - -#define OMAP3_STALKER_TS_GPIO 175 - -static struct usbhs_phy_data phy_data[] __initdata = { - { - .port = 2, - .reset_gpio = 21, - .vcc_gpio = -EINVAL, - }, -}; - -static struct platform_device *omap3_stalker_devices[] __initdata = { - &keys_gpio, - &omap3stalker_tfp410_device, - &omap3stalker_dvi_connector_device, - &omap3stalker_tv_connector_device, -}; - -static struct usbhs_omap_platform_data usbhs_bdata __initdata = { - .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, -}; - -#ifdef CONFIG_OMAP_MUX -static struct omap_board_mux board_mux[] __initdata = { - OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP | - OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE), - OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP | - OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE), - {.reg_offset = OMAP_MUX_TERMINATOR}, -}; -#endif - -static struct regulator_consumer_supply dummy_supplies[] = { - REGULATOR_SUPPLY("vddvario", "smsc911x.0"), - REGULATOR_SUPPLY("vdd33a", "smsc911x.0"), -}; - -static void __init omap3_stalker_init(void) -{ - regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies)); - omap3_mux_init(board_mux, OMAP_PACKAGE_CUS); - - omap_mux_init_gpio(23, OMAP_PIN_INPUT); - omap_hsmmc_init(mmc); - - omap3_stalker_i2c_init(); - - platform_add_devices(omap3_stalker_devices, - ARRAY_SIZE(omap3_stalker_devices)); - - omap_display_init(&omap3_stalker_dss_data); - - omap_serial_init(); - omap_sdrc_init(mt46h32m32lf6_sdrc_params, NULL); - usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb"); - usb_musb_init(NULL); - - usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data)); - usbhs_init(&usbhs_bdata); - omap_ads7846_init(1, OMAP3_STALKER_TS_GPIO, 310, NULL); - - omap_mux_init_gpio(21, OMAP_PIN_OUTPUT); - omap_mux_init_gpio(18, OMAP_PIN_INPUT_PULLUP); - - omap3stalker_init_eth(); - omap3_stalker_display_init(); -/* Ensure SDRC pins are mux'd for self-refresh */ - omap_mux_init_signal("sdr_cke0", OMAP_PIN_OUTPUT); - omap_mux_init_signal("sdr_cke1", OMAP_PIN_OUTPUT); -} - -MACHINE_START(SBC3530, "OMAP3 STALKER") - /* Maintainer: Jason Lam -lzg@ema-tech.com */ - .atag_offset = 0x100, - .map_io = omap3_map_io, - .init_early = omap35xx_init_early, - .init_irq = omap3_init_irq, - .init_machine = omap3_stalker_init, - .init_late = omap35xx_init_late, - .init_time = omap3_secure_sync32k_timer_init, - .restart = omap3xxx_restart, -MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c deleted file mode 100644 index a01993e5500f..000000000000 --- a/arch/arm/mach-omap2/board-omap3touchbook.c +++ /dev/null @@ -1,395 +0,0 @@ -/* - * linux/arch/arm/mach-omap2/board-omap3touchbook.c - * - * Copyright (C) 2009 Always Innovating - * - * Modified from mach-omap2/board-omap3beagleboard.c - * - * Initial code: Grégoire Gentil, Tim Yamin - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/err.h> -#include <linux/clk.h> -#include <linux/io.h> -#include <linux/leds.h> -#include <linux/gpio.h> -#include <linux/input.h> -#include <linux/gpio_keys.h> - -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/mtd/nand.h> -#include <linux/mmc/host.h> -#include <linux/usb/phy.h> - -#include <linux/platform_data/spi-omap2-mcspi.h> -#include <linux/spi/spi.h> - -#include <linux/spi/ads7846.h> - -#include <linux/regulator/machine.h> -#include <linux/i2c/twl.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/flash.h> -#include <asm/system_info.h> - -#include "common.h" -#include "gpmc.h" -#include <linux/platform_data/mtd-nand-omap2.h> - -#include "mux.h" -#include "hsmmc.h" -#include "board-flash.h" -#include "common-board-devices.h" - -#include <asm/setup.h> - -#define OMAP3_AC_GPIO 136 -#define OMAP3_TS_GPIO 162 -#define TB_BL_PWM_TIMER 9 -#define TB_KILL_POWER_GPIO 168 - -#define NAND_CS 0 - -static unsigned long touchbook_revision; - -static struct mtd_partition omap3touchbook_nand_partitions[] = { - /* All the partition sizes are listed in terms of NAND block size */ - { - .name = "X-Loader", - .offset = 0, - .size = 4 * NAND_BLOCK_SIZE, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - { - .name = "U-Boot", - .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */ - .size = 15 * NAND_BLOCK_SIZE, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - { - .name = "U-Boot Env", - .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */ - .size = 1 * NAND_BLOCK_SIZE, - }, - { - .name = "Kernel", - .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */ - .size = 32 * NAND_BLOCK_SIZE, - }, - { - .name = "File System", - .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */ - .size = MTDPART_SIZ_FULL, - }, -}; - -#include "sdram-micron-mt46h32m32lf-6.h" - -static struct omap2_hsmmc_info mmc[] = { - { - .mmc = 1, - .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, - .gpio_wp = 29, - .deferred = true, - }, - {} /* Terminator */ -}; - -static struct regulator_consumer_supply touchbook_vmmc1_supply[] = { - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), -}; - -static struct regulator_consumer_supply touchbook_vsim_supply[] = { - REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), -}; - -static struct gpio_led gpio_leds[]; - -static int touchbook_twl_gpio_setup(struct device *dev, - unsigned gpio, unsigned ngpio) -{ - /* gpio + 0 is "mmc0_cd" (input/IRQ) */ - mmc[0].gpio_cd = gpio + 0; - omap_hsmmc_late_init(mmc); - - /* REVISIT: need ehci-omap hooks for external VBUS - * power switch and overcurrent detect - */ - gpio_request_one(gpio + 1, GPIOF_IN, "EHCI_nOC"); - - /* TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, active low) */ - gpio_request_one(gpio + TWL4030_GPIO_MAX, GPIOF_OUT_INIT_LOW, - "nEN_USB_PWR"); - - /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ - gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; - - return 0; -} - -static struct twl4030_gpio_platform_data touchbook_gpio_data = { - .use_leds = true, - .pullups = BIT(1), - .pulldowns = BIT(2) | BIT(6) | BIT(7) | BIT(8) | BIT(13) - | BIT(15) | BIT(16) | BIT(17), - .setup = touchbook_twl_gpio_setup, -}; - -static struct regulator_consumer_supply touchbook_vdac_supply[] = { -{ - .supply = "vdac", -}, -}; - -static struct regulator_consumer_supply touchbook_vdvi_supply[] = { -{ - .supply = "vdvi", -}, -}; - -/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ -static struct regulator_init_data touchbook_vmmc1 = { - .constraints = { - .min_uV = 1850000, - .max_uV = 3150000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(touchbook_vmmc1_supply), - .consumer_supplies = touchbook_vmmc1_supply, -}; - -/* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ -static struct regulator_init_data touchbook_vsim = { - .constraints = { - .min_uV = 1800000, - .max_uV = 3000000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(touchbook_vsim_supply), - .consumer_supplies = touchbook_vsim_supply, -}; - -static struct twl4030_platform_data touchbook_twldata = { - /* platform_data for children goes here */ - .gpio = &touchbook_gpio_data, - .vmmc1 = &touchbook_vmmc1, - .vsim = &touchbook_vsim, -}; - -static struct i2c_board_info __initdata touchBook_i2c_boardinfo[] = { - { - I2C_BOARD_INFO("bq27200", 0x55), - }, -}; - -static int __init omap3_touchbook_i2c_init(void) -{ - /* Standard TouchBook bus */ - omap3_pmic_get_config(&touchbook_twldata, - TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, - TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); - - touchbook_twldata.vdac->num_consumer_supplies = - ARRAY_SIZE(touchbook_vdac_supply); - touchbook_twldata.vdac->consumer_supplies = touchbook_vdac_supply; - - touchbook_twldata.vpll2->constraints.name = "VDVI"; - touchbook_twldata.vpll2->num_consumer_supplies = - ARRAY_SIZE(touchbook_vdvi_supply); - touchbook_twldata.vpll2->consumer_supplies = touchbook_vdvi_supply; - - omap3_pmic_init("twl4030", &touchbook_twldata); - /* Additional TouchBook bus */ - omap_register_i2c_bus(3, 100, touchBook_i2c_boardinfo, - ARRAY_SIZE(touchBook_i2c_boardinfo)); - - return 0; -} - -static struct ads7846_platform_data ads7846_pdata = { - .x_min = 100, - .y_min = 265, - .x_max = 3950, - .y_max = 3750, - .x_plate_ohms = 40, - .pressure_max = 255, - .debounce_max = 10, - .debounce_tol = 5, - .debounce_rep = 1, - .gpio_pendown = OMAP3_TS_GPIO, - .keep_vref_on = 1, -}; - -static struct gpio_led gpio_leds[] = { - { - .name = "touchbook::usr0", - .default_trigger = "heartbeat", - .gpio = 150, - }, - { - .name = "touchbook::usr1", - .default_trigger = "mmc0", - .gpio = 149, - }, - { - .name = "touchbook::pmu_stat", - .gpio = -EINVAL, /* gets replaced */ - .active_low = true, - }, -}; - -static struct gpio_led_platform_data gpio_led_info = { - .leds = gpio_leds, - .num_leds = ARRAY_SIZE(gpio_leds), -}; - -static struct platform_device leds_gpio = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &gpio_led_info, - }, -}; - -static struct gpio_keys_button gpio_buttons[] = { - { - .code = BTN_EXTRA, - .gpio = 7, - .desc = "user", - .wakeup = 1, - }, - { - .code = KEY_POWER, - .gpio = 183, - .desc = "power", - .wakeup = 1, - }, -}; - -static struct gpio_keys_platform_data gpio_key_info = { - .buttons = gpio_buttons, - .nbuttons = ARRAY_SIZE(gpio_buttons), -}; - -static struct platform_device keys_gpio = { - .name = "gpio-keys", - .id = -1, - .dev = { - .platform_data = &gpio_key_info, - }, -}; - -#ifdef CONFIG_OMAP_MUX -static struct omap_board_mux board_mux[] __initdata = { - { .reg_offset = OMAP_MUX_TERMINATOR }, -}; -#endif - -static struct usbhs_phy_data phy_data[] __initdata = { - { - .port = 2, - .reset_gpio = 147, - .vcc_gpio = -EINVAL, - }, -}; - -static struct platform_device *omap3_touchbook_devices[] __initdata = { - &leds_gpio, - &keys_gpio, -}; - -static struct usbhs_omap_platform_data usbhs_bdata __initdata = { - .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, - .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, -}; - -static void omap3_touchbook_poweroff(void) -{ - int pwr_off = TB_KILL_POWER_GPIO; - - if (gpio_request_one(pwr_off, GPIOF_OUT_INIT_LOW, "DVI reset") < 0) - printk(KERN_ERR "Unable to get kill power GPIO\n"); -} - -static int __init early_touchbook_revision(char *p) -{ - if (!p) - return 0; - - return kstrtoul(p, 10, &touchbook_revision); -} -early_param("tbr", early_touchbook_revision); - -static void __init omap3_touchbook_init(void) -{ - omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); - - pm_power_off = omap3_touchbook_poweroff; - - if (system_rev >= 0x20 && system_rev <= 0x34301000) { - omap_mux_init_gpio(23, OMAP_PIN_INPUT); - mmc[0].gpio_wp = 23; - } else { - omap_mux_init_gpio(29, OMAP_PIN_INPUT); - } - omap_hsmmc_init(mmc); - - omap3_touchbook_i2c_init(); - platform_add_devices(omap3_touchbook_devices, - ARRAY_SIZE(omap3_touchbook_devices)); - omap_serial_init(); - omap_sdrc_init(mt46h32m32lf6_sdrc_params, - mt46h32m32lf6_sdrc_params); - - omap_mux_init_gpio(170, OMAP_PIN_INPUT); - /* REVISIT leave DVI powered down until it's needed ... */ - gpio_request_one(176, GPIOF_OUT_INIT_HIGH, "DVI_nPD"); - - /* Touchscreen and accelerometer */ - omap_ads7846_init(4, OMAP3_TS_GPIO, 310, &ads7846_pdata); - usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb"); - usb_musb_init(NULL); - - usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data)); - usbhs_init(&usbhs_bdata); - board_nand_init(omap3touchbook_nand_partitions, - ARRAY_SIZE(omap3touchbook_nand_partitions), NAND_CS, - NAND_BUSWIDTH_16, NULL); - - /* Ensure SDRC pins are mux'd for self-refresh */ - omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); - omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT); -} - -MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board") - /* Maintainer: Gregoire Gentil - http://www.alwaysinnovating.com */ - .atag_offset = 0x100, - .reserve = omap_reserve, - .map_io = omap3_map_io, - .init_early = omap3430_init_early, - .init_irq = omap3_init_irq, - .init_machine = omap3_touchbook_init, - .init_late = omap3430_init_late, - .init_time = omap3_secure_sync32k_timer_init, - .restart = omap3xxx_restart, -MACHINE_END diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index 6124db5c37ae..a699d7169307 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c @@ -23,6 +23,9 @@ #include <linux/clk-provider.h> #include <linux/io.h> #include <linux/bitops.h> +#include <linux/regmap.h> +#include <linux/of_address.h> +#include <linux/bootmem.h> #include <asm/cpu.h> #include <trace/events/power.h> @@ -72,30 +75,110 @@ struct ti_clk_features ti_clk_features; static bool clkdm_control = true; static LIST_HEAD(clk_hw_omap_clocks); -void __iomem *clk_memmaps[CLK_MAX_MEMMAPS]; + +struct clk_iomap { + struct regmap *regmap; + void __iomem *mem; +}; + +static struct clk_iomap *clk_memmaps[CLK_MAX_MEMMAPS]; + +static void clk_memmap_writel(u32 val, void __iomem *reg) +{ + struct clk_omap_reg *r = (struct clk_omap_reg *)® + struct clk_iomap *io = clk_memmaps[r->index]; + + if (io->regmap) + regmap_write(io->regmap, r->offset, val); + else + writel_relaxed(val, io->mem + r->offset); +} + +static u32 clk_memmap_readl(void __iomem *reg) +{ + u32 val; + struct clk_omap_reg *r = (struct clk_omap_reg *)® + struct clk_iomap *io = clk_memmaps[r->index]; + + if (io->regmap) + regmap_read(io->regmap, r->offset, &val); + else + val = readl_relaxed(io->mem + r->offset); + + return val; +} void omap2_clk_writel(u32 val, struct clk_hw_omap *clk, void __iomem *reg) { - if (clk->flags & MEMMAP_ADDRESSING) { - struct clk_omap_reg *r = (struct clk_omap_reg *)® - writel_relaxed(val, clk_memmaps[r->index] + r->offset); - } else { + if (WARN_ON_ONCE(!(clk->flags & MEMMAP_ADDRESSING))) writel_relaxed(val, reg); - } + else + clk_memmap_writel(val, reg); } u32 omap2_clk_readl(struct clk_hw_omap *clk, void __iomem *reg) { - u32 val; + if (WARN_ON_ONCE(!(clk->flags & MEMMAP_ADDRESSING))) + return readl_relaxed(reg); + else + return clk_memmap_readl(reg); +} - if (clk->flags & MEMMAP_ADDRESSING) { - struct clk_omap_reg *r = (struct clk_omap_reg *)® - val = readl_relaxed(clk_memmaps[r->index] + r->offset); - } else { - val = readl_relaxed(reg); - } +static struct ti_clk_ll_ops omap_clk_ll_ops = { + .clk_readl = clk_memmap_readl, + .clk_writel = clk_memmap_writel, +}; - return val; +/** + * omap2_clk_provider_init - initialize a clock provider + * @match_table: DT device table to match for devices to init + * @np: device node pointer for the this clock provider + * @index: index for the clock provider + + @syscon: syscon regmap pointer + * @mem: iomem pointer for the clock provider memory area, only used if + * syscon is not provided + * + * Initializes a clock provider module (CM/PRM etc.), registering + * the memory mapping at specified index and initializing the + * low level driver infrastructure. Returns 0 in success. + */ +int __init omap2_clk_provider_init(struct device_node *np, int index, + struct regmap *syscon, void __iomem *mem) +{ + struct clk_iomap *io; + + ti_clk_ll_ops = &omap_clk_ll_ops; + + io = kzalloc(sizeof(*io), GFP_KERNEL); + + io->regmap = syscon; + io->mem = mem; + + clk_memmaps[index] = io; + + ti_dt_clk_init_provider(np, index); + + return 0; +} + +/** + * omap2_clk_legacy_provider_init - initialize a legacy clock provider + * @index: index for the clock provider + * @mem: iomem pointer for the clock provider memory area + * + * Initializes a legacy clock provider memory mapping. + */ +void __init omap2_clk_legacy_provider_init(int index, void __iomem *mem) +{ + struct clk_iomap *io; + + ti_clk_ll_ops = &omap_clk_ll_ops; + + io = memblock_virt_alloc(sizeof(*io), 0); + + io->mem = mem; + + clk_memmaps[index] = io; } /* diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h index a56742f96000..652ed0ab86ec 100644 --- a/arch/arm/mach-omap2/clock.h +++ b/arch/arm/mach-omap2/clock.h @@ -271,10 +271,14 @@ extern const struct clksel_rate div_1_3_rates[]; extern const struct clksel_rate div_1_4_rates[]; extern const struct clksel_rate div31_1to31_rates[]; -extern void __iomem *clk_memmaps[]; - extern int omap2_clkops_enable_clkdm(struct clk_hw *hw); extern void omap2_clkops_disable_clkdm(struct clk_hw *hw); +struct regmap; + +int __init omap2_clk_provider_init(struct device_node *np, int index, + struct regmap *syscon, void __iomem *mem); +void __init omap2_clk_legacy_provider_init(int index, void __iomem *mem); + void __init ti_clk_init_features(void); #endif diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h index 6222e87a79b6..1fe3e6b833d2 100644 --- a/arch/arm/mach-omap2/cm.h +++ b/arch/arm/mach-omap2/cm.h @@ -70,6 +70,8 @@ int omap_cm_module_enable(u8 mode, u8 part, u16 inst, u16 clkctrl_offs); int omap_cm_module_disable(u8 part, u16 inst, u16 clkctrl_offs); extern int cm_register(struct cm_ll_data *cld); extern int cm_unregister(struct cm_ll_data *cld); +int omap_cm_init(void); +int omap2_cm_base_init(void); # endif diff --git a/arch/arm/mach-omap2/cm2xxx.c b/arch/arm/mach-omap2/cm2xxx.c index ef62ac9dcd05..3e5fd3587eb1 100644 --- a/arch/arm/mach-omap2/cm2xxx.c +++ b/arch/arm/mach-omap2/cm2xxx.c @@ -393,7 +393,7 @@ static struct cm_ll_data omap2xxx_cm_ll_data = { .wait_module_ready = &omap2xxx_cm_wait_module_ready, }; -int __init omap2xxx_cm_init(void) +int __init omap2xxx_cm_init(const struct omap_prcm_init_data *data) { return cm_register(&omap2xxx_cm_ll_data); } diff --git a/arch/arm/mach-omap2/cm2xxx.h b/arch/arm/mach-omap2/cm2xxx.h index 83b6c597b0e1..7b8c79c0ce27 100644 --- a/arch/arm/mach-omap2/cm2xxx.h +++ b/arch/arm/mach-omap2/cm2xxx.h @@ -63,7 +63,7 @@ extern u32 omap2xxx_cm_get_core_pll_config(void); extern void omap2xxx_cm_set_mod_dividers(u32 mpu, u32 dsp, u32 gfx, u32 core, u32 mdm); -extern int __init omap2xxx_cm_init(void); +int __init omap2xxx_cm_init(const struct omap_prcm_init_data *data); #endif diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c index cc5aac784278..7b181f929525 100644 --- a/arch/arm/mach-omap2/cm33xx.c +++ b/arch/arm/mach-omap2/cm33xx.c @@ -352,7 +352,7 @@ static struct cm_ll_data am33xx_cm_ll_data = { .module_disable = &am33xx_cm_module_disable, }; -int __init am33xx_cm_init(void) +int __init am33xx_cm_init(const struct omap_prcm_init_data *data) { return cm_register(&am33xx_cm_ll_data); } diff --git a/arch/arm/mach-omap2/cm33xx.h b/arch/arm/mach-omap2/cm33xx.h index 046b4b2bc9d9..a91f7d282455 100644 --- a/arch/arm/mach-omap2/cm33xx.h +++ b/arch/arm/mach-omap2/cm33xx.h @@ -19,6 +19,7 @@ #include "cm.h" #include "cm-regbits-33xx.h" +#include "prcm-common.h" /* CM base address */ #define AM33XX_CM_BASE 0x44e00000 @@ -374,6 +375,6 @@ #ifndef __ASSEMBLER__ -int am33xx_cm_init(void); +int am33xx_cm_init(const struct omap_prcm_init_data *data); #endif /* ASSEMBLER */ #endif diff --git a/arch/arm/mach-omap2/cm3xxx.c b/arch/arm/mach-omap2/cm3xxx.c index ebead8f035f9..187fa4386718 100644 --- a/arch/arm/mach-omap2/cm3xxx.c +++ b/arch/arm/mach-omap2/cm3xxx.c @@ -671,8 +671,9 @@ static struct cm_ll_data omap3xxx_cm_ll_data = { .wait_module_ready = &omap3xxx_cm_wait_module_ready, }; -int __init omap3xxx_cm_init(void) +int __init omap3xxx_cm_init(const struct omap_prcm_init_data *data) { + omap2_clk_legacy_provider_init(TI_CLKM_CM, cm_base + OMAP3430_IVA2_MOD); return cm_register(&omap3xxx_cm_ll_data); } diff --git a/arch/arm/mach-omap2/cm3xxx.h b/arch/arm/mach-omap2/cm3xxx.h index 734a8581c0c4..bc444e2080a1 100644 --- a/arch/arm/mach-omap2/cm3xxx.h +++ b/arch/arm/mach-omap2/cm3xxx.h @@ -72,7 +72,7 @@ extern void omap3_cm_save_context(void); extern void omap3_cm_restore_context(void); extern void omap3_cm_save_scratchpad_contents(u32 *ptr); -extern int __init omap3xxx_cm_init(void); +int __init omap3xxx_cm_init(const struct omap_prcm_init_data *data); #endif diff --git a/arch/arm/mach-omap2/cm44xx.h b/arch/arm/mach-omap2/cm44xx.h index 728d06a4af19..309a4c913448 100644 --- a/arch/arm/mach-omap2/cm44xx.h +++ b/arch/arm/mach-omap2/cm44xx.h @@ -23,7 +23,6 @@ #define OMAP4_CM_CLKSTCTRL 0x0000 #define OMAP4_CM_STATICDEP 0x0004 -void omap_cm_base_init(void); -int omap4_cm_init(void); +int omap4_cm_init(const struct omap_prcm_init_data *data); #endif diff --git a/arch/arm/mach-omap2/cm_common.c b/arch/arm/mach-omap2/cm_common.c index 8fe02fcedc48..23e8bcec34e3 100644 --- a/arch/arm/mach-omap2/cm_common.c +++ b/arch/arm/mach-omap2/cm_common.c @@ -15,10 +15,14 @@ #include <linux/init.h> #include <linux/errno.h> #include <linux/bug.h> +#include <linux/of.h> +#include <linux/of_address.h> #include "cm2xxx.h" #include "cm3xxx.h" +#include "cm33xx.h" #include "cm44xx.h" +#include "clock.h" /* * cm_ll_data: function pointers to SoC-specific implementations of @@ -33,6 +37,9 @@ void __iomem *cm_base; /* cm2_base: base virtual address of the CM2 IP block (OMAP44xx only) */ void __iomem *cm2_base; +#define CM_NO_CLOCKS 0x1 +#define CM_SINGLE_INSTANCE 0x2 + /** * omap2_set_globals_cm - set the CM/CM2 base addresses (for early use) * @cm: CM base virtual address @@ -212,3 +219,152 @@ int cm_unregister(struct cm_ll_data *cld) return 0; } + +#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \ + defined(CONFIG_SOC_DRA7XX) +static struct omap_prcm_init_data cm_data __initdata = { + .index = TI_CLKM_CM, + .init = omap4_cm_init, +}; + +static struct omap_prcm_init_data cm2_data __initdata = { + .index = TI_CLKM_CM2, + .init = omap4_cm_init, +}; +#endif + +#ifdef CONFIG_ARCH_OMAP2 +static struct omap_prcm_init_data omap2_prcm_data __initdata = { + .index = TI_CLKM_CM, + .init = omap2xxx_cm_init, + .flags = CM_NO_CLOCKS | CM_SINGLE_INSTANCE, +}; +#endif + +#ifdef CONFIG_ARCH_OMAP3 +static struct omap_prcm_init_data omap3_cm_data __initdata = { + .index = TI_CLKM_CM, + .init = omap3xxx_cm_init, + .flags = CM_SINGLE_INSTANCE, + + /* + * IVA2 offset is a negative value, must offset the cm_base address + * by this to get it to positive side on the iomap + */ + .offset = -OMAP3430_IVA2_MOD, +}; +#endif + +#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_TI81XX) +static struct omap_prcm_init_data am3_prcm_data __initdata = { + .index = TI_CLKM_CM, + .flags = CM_NO_CLOCKS | CM_SINGLE_INSTANCE, + .init = am33xx_cm_init, +}; +#endif + +#ifdef CONFIG_SOC_AM43XX +static struct omap_prcm_init_data am4_prcm_data __initdata = { + .index = TI_CLKM_CM, + .flags = CM_NO_CLOCKS | CM_SINGLE_INSTANCE, + .init = omap4_cm_init, +}; +#endif + +static const struct of_device_id omap_cm_dt_match_table[] __initconst = { +#ifdef CONFIG_ARCH_OMAP2 + { .compatible = "ti,omap2-prcm", .data = &omap2_prcm_data }, +#endif +#ifdef CONFIG_ARCH_OMAP3 + { .compatible = "ti,omap3-cm", .data = &omap3_cm_data }, +#endif +#ifdef CONFIG_ARCH_OMAP4 + { .compatible = "ti,omap4-cm1", .data = &cm_data }, + { .compatible = "ti,omap4-cm2", .data = &cm2_data }, +#endif +#ifdef CONFIG_SOC_OMAP5 + { .compatible = "ti,omap5-cm-core-aon", .data = &cm_data }, + { .compatible = "ti,omap5-cm-core", .data = &cm2_data }, +#endif +#ifdef CONFIG_SOC_DRA7XX + { .compatible = "ti,dra7-cm-core-aon", .data = &cm_data }, + { .compatible = "ti,dra7-cm-core", .data = &cm2_data }, +#endif +#ifdef CONFIG_SOC_AM33XX + { .compatible = "ti,am3-prcm", .data = &am3_prcm_data }, +#endif +#ifdef CONFIG_SOC_AM43XX + { .compatible = "ti,am4-prcm", .data = &am4_prcm_data }, +#endif +#ifdef CONFIG_SOC_TI81XX + { .compatible = "ti,dm814-prcm", .data = &am3_prcm_data }, + { .compatible = "ti,dm816-prcm", .data = &am3_prcm_data }, +#endif + { } +}; + +/** + * omap2_cm_base_init - initialize iomappings for the CM drivers + * + * Detects and initializes the iomappings for the CM driver, based + * on the DT data. Returns 0 in success, negative error value + * otherwise. + */ +int __init omap2_cm_base_init(void) +{ + struct device_node *np; + const struct of_device_id *match; + struct omap_prcm_init_data *data; + void __iomem *mem; + + for_each_matching_node_and_match(np, omap_cm_dt_match_table, &match) { + data = (struct omap_prcm_init_data *)match->data; + + mem = of_iomap(np, 0); + if (!mem) + return -ENOMEM; + + if (data->index == TI_CLKM_CM) + cm_base = mem + data->offset; + + if (data->index == TI_CLKM_CM2) + cm2_base = mem + data->offset; + + data->mem = mem; + + data->np = np; + + if (data->init && (data->flags & CM_SINGLE_INSTANCE || + (cm_base && cm2_base))) + data->init(data); + } + + return 0; +} + +/** + * omap_cm_init - low level init for the CM drivers + * + * Initializes the low level clock infrastructure for CM drivers. + * Returns 0 in success, negative error value in failure. + */ +int __init omap_cm_init(void) +{ + struct device_node *np; + const struct of_device_id *match; + const struct omap_prcm_init_data *data; + int ret; + + for_each_matching_node_and_match(np, omap_cm_dt_match_table, &match) { + data = match->data; + + if (data->flags & CM_NO_CLOCKS) + continue; + + ret = omap2_clk_provider_init(np, data->index, NULL, data->mem); + if (ret) + return ret; + } + + return 0; +} diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c index 95a8cff66aff..2c0e07ed6b99 100644 --- a/arch/arm/mach-omap2/cminst44xx.c +++ b/arch/arm/mach-omap2/cminst44xx.c @@ -63,7 +63,7 @@ static void __iomem *_cm_bases[OMAP4_MAX_PRCM_PARTITIONS]; * Populates the base addresses of the _cm_bases * array used for read/write of cm module registers. */ -void omap_cm_base_init(void) +static void omap_cm_base_init(void) { _cm_bases[OMAP4430_PRM_PARTITION] = prm_base; _cm_bases[OMAP4430_CM1_PARTITION] = cm_base; @@ -514,8 +514,10 @@ static struct cm_ll_data omap4xxx_cm_ll_data = { .module_disable = &omap4_cminst_module_disable, }; -int __init omap4_cm_init(void) +int __init omap4_cm_init(const struct omap_prcm_init_data *data) { + omap_cm_base_init(); + return cm_register(&omap4xxx_cm_ll_data); } diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c index 484cdadfb187..eae6a0e87c90 100644 --- a/arch/arm/mach-omap2/common.c +++ b/arch/arm/mach-omap2/common.c @@ -30,5 +30,4 @@ int __weak omap_secure_ram_reserve_memblock(void) void __init omap_reserve(void) { omap_secure_ram_reserve_memblock(); - omap_barrier_reserve_memblock(); } diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index 46e24581d624..cf3cf22ecd42 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h @@ -200,9 +200,6 @@ void __init omap4_map_io(void); void __init omap5_map_io(void); void __init ti81xx_map_io(void); -/* omap_barriers_init() is OMAP4 only */ -void omap_barriers_init(void); - /** * omap_test_timeout - busy-loop, testing a condition * @cond: condition to test until it evaluates to true diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index da041b4ab29c..af95a624fe71 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c @@ -14,6 +14,9 @@ #include <linux/kernel.h> #include <linux/io.h> +#include <linux/of_address.h> +#include <linux/regmap.h> +#include <linux/mfd/syscon.h> #include "soc.h" #include "iomap.h" @@ -25,13 +28,15 @@ #include "sdrc.h" #include "pm.h" #include "control.h" +#include "clock.h" /* Used by omap3_ctrl_save_padconf() */ #define START_PADCONF_SAVE 0x2 #define PADCONF_SAVE_DONE 0x1 static void __iomem *omap2_ctrl_base; -static void __iomem *omap4_ctrl_pad_base; +static s16 omap2_ctrl_offset; +static struct regmap *omap2_ctrl_syscon; #if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM) struct omap3_scratchpad { @@ -133,66 +138,79 @@ struct omap3_control_regs { static struct omap3_control_regs control_context; #endif /* CONFIG_ARCH_OMAP3 && CONFIG_PM */ -#define OMAP_CTRL_REGADDR(reg) (omap2_ctrl_base + (reg)) -#define OMAP4_CTRL_PAD_REGADDR(reg) (omap4_ctrl_pad_base + (reg)) - -void __init omap2_set_globals_control(void __iomem *ctrl, - void __iomem *ctrl_pad) +void __init omap2_set_globals_control(void __iomem *ctrl) { omap2_ctrl_base = ctrl; - omap4_ctrl_pad_base = ctrl_pad; -} - -void __iomem *omap_ctrl_base_get(void) -{ - return omap2_ctrl_base; } u8 omap_ctrl_readb(u16 offset) { - return readb_relaxed(OMAP_CTRL_REGADDR(offset)); + u32 val; + u8 byte_offset = offset & 0x3; + + val = omap_ctrl_readl(offset); + + return (val >> (byte_offset * 8)) & 0xff; } u16 omap_ctrl_readw(u16 offset) { - return readw_relaxed(OMAP_CTRL_REGADDR(offset)); + u32 val; + u16 byte_offset = offset & 0x2; + + val = omap_ctrl_readl(offset); + + return (val >> (byte_offset * 8)) & 0xffff; } u32 omap_ctrl_readl(u16 offset) { - return readl_relaxed(OMAP_CTRL_REGADDR(offset)); + u32 val; + + offset &= 0xfffc; + if (!omap2_ctrl_syscon) + val = readl_relaxed(omap2_ctrl_base + offset); + else + regmap_read(omap2_ctrl_syscon, omap2_ctrl_offset + offset, + &val); + + return val; } void omap_ctrl_writeb(u8 val, u16 offset) { - writeb_relaxed(val, OMAP_CTRL_REGADDR(offset)); + u32 tmp; + u8 byte_offset = offset & 0x3; + + tmp = omap_ctrl_readl(offset); + + tmp &= 0xffffffff ^ (0xff << (byte_offset * 8)); + tmp |= val << (byte_offset * 8); + + omap_ctrl_writel(tmp, offset); } void omap_ctrl_writew(u16 val, u16 offset) { - writew_relaxed(val, OMAP_CTRL_REGADDR(offset)); -} + u32 tmp; + u8 byte_offset = offset & 0x2; -void omap_ctrl_writel(u32 val, u16 offset) -{ - writel_relaxed(val, OMAP_CTRL_REGADDR(offset)); -} + tmp = omap_ctrl_readl(offset); -/* - * On OMAP4 control pad are not addressable from control - * core base. So the common omap_ctrl_read/write APIs breaks - * Hence export separate APIs to manage the omap4 pad control - * registers. This APIs will work only for OMAP4 - */ + tmp &= 0xffffffff ^ (0xffff << (byte_offset * 8)); + tmp |= val << (byte_offset * 8); -u32 omap4_ctrl_pad_readl(u16 offset) -{ - return readl_relaxed(OMAP4_CTRL_PAD_REGADDR(offset)); + omap_ctrl_writel(tmp, offset); } -void omap4_ctrl_pad_writel(u32 val, u16 offset) +void omap_ctrl_writel(u32 val, u16 offset) { - writel_relaxed(val, OMAP4_CTRL_PAD_REGADDR(offset)); + offset &= 0xfffc; + if (!omap2_ctrl_syscon) + writel_relaxed(val, omap2_ctrl_base + offset); + else + regmap_write(omap2_ctrl_syscon, omap2_ctrl_offset + offset, + val); } #ifdef CONFIG_ARCH_OMAP3 @@ -611,3 +629,120 @@ void __init omap3_ctrl_init(void) omap3_ctrl_setup_d2d_padconf(); } #endif /* CONFIG_ARCH_OMAP3 && CONFIG_PM */ + +struct control_init_data { + int index; + s16 offset; +}; + +static struct control_init_data ctrl_data = { + .index = TI_CLKM_CTRL, +}; + +static const struct control_init_data omap2_ctrl_data = { + .index = TI_CLKM_CTRL, + .offset = -OMAP2_CONTROL_GENERAL, +}; + +static const struct of_device_id omap_scrm_dt_match_table[] = { + { .compatible = "ti,am3-scm", .data = &ctrl_data }, + { .compatible = "ti,am4-scm", .data = &ctrl_data }, + { .compatible = "ti,omap2-scm", .data = &omap2_ctrl_data }, + { .compatible = "ti,omap3-scm", .data = &omap2_ctrl_data }, + { .compatible = "ti,dm816-scrm", .data = &ctrl_data }, + { .compatible = "ti,omap4-scm-core", .data = &ctrl_data }, + { .compatible = "ti,omap5-scm-core", .data = &ctrl_data }, + { .compatible = "ti,dra7-scm-core", .data = &ctrl_data }, + { } +}; + +/** + * omap2_control_base_init - initialize iomappings for the control driver + * + * Detects and initializes the iomappings for the control driver, based + * on the DT data. Returns 0 in success, negative error value + * otherwise. + */ +int __init omap2_control_base_init(void) +{ + struct device_node *np; + const struct of_device_id *match; + struct control_init_data *data; + + for_each_matching_node_and_match(np, omap_scrm_dt_match_table, &match) { + data = (struct control_init_data *)match->data; + + omap2_ctrl_base = of_iomap(np, 0); + if (!omap2_ctrl_base) + return -ENOMEM; + + omap2_ctrl_offset = data->offset; + } + + return 0; +} + +/** + * omap_control_init - low level init for the control driver + * + * Initializes the low level clock infrastructure for control driver. + * Returns 0 in success, negative error value in failure. + */ +int __init omap_control_init(void) +{ + struct device_node *np, *scm_conf; + const struct of_device_id *match; + const struct omap_prcm_init_data *data; + int ret; + struct regmap *syscon; + + for_each_matching_node_and_match(np, omap_scrm_dt_match_table, &match) { + data = match->data; + + /* + * Check if we have scm_conf node, if yes, use this to + * access clock registers. + */ + scm_conf = of_get_child_by_name(np, "scm_conf"); + + if (scm_conf) { + syscon = syscon_node_to_regmap(scm_conf); + + if (IS_ERR(syscon)) + return PTR_ERR(syscon); + + omap2_ctrl_syscon = syscon; + + if (of_get_child_by_name(scm_conf, "clocks")) { + ret = omap2_clk_provider_init(scm_conf, + data->index, + syscon, NULL); + if (ret) + return ret; + } + + iounmap(omap2_ctrl_base); + omap2_ctrl_base = NULL; + } else { + /* No scm_conf found, direct access */ + ret = omap2_clk_provider_init(np, data->index, NULL, + omap2_ctrl_base); + if (ret) + return ret; + } + } + + return 0; +} + +/** + * omap3_control_legacy_iomap_init - legacy iomap init for clock providers + * + * Legacy iomap init for clock provider. Needed only by legacy boot mode, + * where the base addresses are not parsed from DT, but still required + * by the clock driver to be setup properly. + */ +void __init omap3_control_legacy_iomap_init(void) +{ + omap2_clk_legacy_provider_init(TI_CLKM_SCRM, omap2_ctrl_base); +} diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h index b8a487181210..80d2b7d8e36e 100644 --- a/arch/arm/mach-omap2/control.h +++ b/arch/arm/mach-omap2/control.h @@ -440,15 +440,12 @@ #ifndef __ASSEMBLY__ #ifdef CONFIG_ARCH_OMAP2PLUS -extern void __iomem *omap_ctrl_base_get(void); extern u8 omap_ctrl_readb(u16 offset); extern u16 omap_ctrl_readw(u16 offset); extern u32 omap_ctrl_readl(u16 offset); -extern u32 omap4_ctrl_pad_readl(u16 offset); extern void omap_ctrl_writeb(u8 val, u16 offset); extern void omap_ctrl_writew(u16 val, u16 offset); extern void omap_ctrl_writel(u32 val, u16 offset); -extern void omap4_ctrl_pad_writel(u32 val, u16 offset); extern void omap3_save_scratchpad_contents(void); extern void omap3_clear_scratchpad_contents(void); @@ -464,10 +461,11 @@ extern void omap_ctrl_write_dsp_boot_mode(u8 bootmode); extern void omap3630_ctrl_disable_rta(void); extern int omap3_ctrl_save_padconf(void); void omap3_ctrl_init(void); -extern void omap2_set_globals_control(void __iomem *ctrl, - void __iomem *ctrl_pad); +int omap2_control_base_init(void); +int omap_control_init(void); +void omap2_set_globals_control(void __iomem *ctrl); +void __init omap3_control_legacy_iomap_init(void); #else -#define omap_ctrl_base_get() 0 #define omap_ctrl_readb(x) 0 #define omap_ctrl_readw(x) 0 #define omap_ctrl_readl(x) 0 diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c index 57d429830e09..4b8e9f4d59ea 100644 --- a/arch/arm/mach-omap2/cpuidle44xx.c +++ b/arch/arm/mach-omap2/cpuidle44xx.c @@ -17,7 +17,6 @@ #include <linux/tick.h> #include <asm/cpuidle.h> -#include <asm/proc-fns.h> #include "common.h" #include "pm.h" diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 1afb50d6d636..990338fbaa59 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c @@ -74,82 +74,12 @@ omap_postcore_initcall(omap3_l3_init); static struct resource omap3isp_resources[] = { { .start = OMAP3430_ISP_BASE, - .end = OMAP3430_ISP_END, + .end = OMAP3430_ISP_BASE + 0x12fc, .flags = IORESOURCE_MEM, }, { - .start = OMAP3430_ISP_CCP2_BASE, - .end = OMAP3430_ISP_CCP2_END, - .flags = IORESOURCE_MEM, - }, - { - .start = OMAP3430_ISP_CCDC_BASE, - .end = OMAP3430_ISP_CCDC_END, - .flags = IORESOURCE_MEM, - }, - { - .start = OMAP3430_ISP_HIST_BASE, - .end = OMAP3430_ISP_HIST_END, - .flags = IORESOURCE_MEM, - }, - { - .start = OMAP3430_ISP_H3A_BASE, - .end = OMAP3430_ISP_H3A_END, - .flags = IORESOURCE_MEM, - }, - { - .start = OMAP3430_ISP_PREV_BASE, - .end = OMAP3430_ISP_PREV_END, - .flags = IORESOURCE_MEM, - }, - { - .start = OMAP3430_ISP_RESZ_BASE, - .end = OMAP3430_ISP_RESZ_END, - .flags = IORESOURCE_MEM, - }, - { - .start = OMAP3430_ISP_SBL_BASE, - .end = OMAP3430_ISP_SBL_END, - .flags = IORESOURCE_MEM, - }, - { - .start = OMAP3430_ISP_CSI2A_REGS1_BASE, - .end = OMAP3430_ISP_CSI2A_REGS1_END, - .flags = IORESOURCE_MEM, - }, - { - .start = OMAP3430_ISP_CSIPHY2_BASE, - .end = OMAP3430_ISP_CSIPHY2_END, - .flags = IORESOURCE_MEM, - }, - { - .start = OMAP3630_ISP_CSI2A_REGS2_BASE, - .end = OMAP3630_ISP_CSI2A_REGS2_END, - .flags = IORESOURCE_MEM, - }, - { - .start = OMAP3630_ISP_CSI2C_REGS1_BASE, - .end = OMAP3630_ISP_CSI2C_REGS1_END, - .flags = IORESOURCE_MEM, - }, - { - .start = OMAP3630_ISP_CSIPHY1_BASE, - .end = OMAP3630_ISP_CSIPHY1_END, - .flags = IORESOURCE_MEM, - }, - { - .start = OMAP3630_ISP_CSI2C_REGS2_BASE, - .end = OMAP3630_ISP_CSI2C_REGS2_END, - .flags = IORESOURCE_MEM, - }, - { - .start = OMAP343X_CTRL_BASE + OMAP343X_CONTROL_CSIRXFE, - .end = OMAP343X_CTRL_BASE + OMAP343X_CONTROL_CSIRXFE + 3, - .flags = IORESOURCE_MEM, - }, - { - .start = OMAP343X_CTRL_BASE + OMAP3630_CONTROL_CAMERA_PHY_CTRL, - .end = OMAP343X_CTRL_BASE + OMAP3630_CONTROL_CAMERA_PHY_CTRL + 3, + .start = OMAP3430_ISP_BASE2, + .end = OMAP3430_ISP_BASE2 + 0x0600, .flags = IORESOURCE_MEM, }, { diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c index 7a050f9c37ff..f492ae147c6a 100644 --- a/arch/arm/mach-omap2/display.c +++ b/arch/arm/mach-omap2/display.c @@ -26,6 +26,8 @@ #include <linux/of.h> #include <linux/of_platform.h> #include <linux/slab.h> +#include <linux/mfd/syscon.h> +#include <linux/regmap.h> #include <video/omapdss.h> #include "omap_hwmod.h" @@ -104,6 +106,10 @@ static const struct omap_dss_hwmod_data omap4_dss_hwmod_data[] __initconst = { { "dss_hdmi", "omapdss_hdmi", -1 }, }; +#define OMAP4_DSIPHY_SYSCON_OFFSET 0x78 + +static struct regmap *omap4_dsi_mux_syscon; + static int omap4_dsi_mux_pads(int dsi_id, unsigned lanes) { u32 enable_mask, enable_shift; @@ -124,7 +130,7 @@ static int omap4_dsi_mux_pads(int dsi_id, unsigned lanes) return -ENODEV; } - reg = omap4_ctrl_pad_readl(OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_DSIPHY); + regmap_read(omap4_dsi_mux_syscon, OMAP4_DSIPHY_SYSCON_OFFSET, ®); reg &= ~enable_mask; reg &= ~pipd_mask; @@ -132,7 +138,7 @@ static int omap4_dsi_mux_pads(int dsi_id, unsigned lanes) reg |= (lanes << enable_shift) & enable_mask; reg |= (lanes << pipd_shift) & pipd_mask; - omap4_ctrl_pad_writel(reg, OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_DSIPHY); + regmap_write(omap4_dsi_mux_syscon, OMAP4_DSIPHY_SYSCON_OFFSET, reg); return 0; } @@ -665,5 +671,10 @@ int __init omapdss_init_of(void) return r; } + /* add DSI info for omap4 */ + node = of_find_node_by_name(NULL, "omap4_padconf_global"); + if (node) + omap4_dsi_mux_syscon = syscon_node_to_regmap(node); + return 0; } diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c index d5951b17b736..72918c4973ea 100644 --- a/arch/arm/mach-omap2/gpmc-nand.c +++ b/arch/arm/mach-omap2/gpmc-nand.c @@ -96,14 +96,6 @@ int gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data, gpmc_nand_res[1].start = gpmc_get_client_irq(GPMC_IRQ_FIFOEVENTENABLE); gpmc_nand_res[2].start = gpmc_get_client_irq(GPMC_IRQ_COUNT_EVENT); - if (gpmc_t) { - err = gpmc_cs_set_timings(gpmc_nand_data->cs, gpmc_t); - if (err < 0) { - pr_err("omap2-gpmc: Unable to set gpmc timings: %d\n", err); - return err; - } - } - memset(&s, 0, sizeof(struct gpmc_settings)); if (gpmc_nand_data->of_node) gpmc_read_settings_dt(gpmc_nand_data->of_node, &s); @@ -111,6 +103,16 @@ int gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data, gpmc_set_legacy(gpmc_nand_data, &s); s.device_nand = true; + + if (gpmc_t) { + err = gpmc_cs_set_timings(gpmc_nand_data->cs, gpmc_t, &s); + if (err < 0) { + pr_err("omap2-gpmc: Unable to set gpmc timings: %d\n", + err); + return err; + } + } + err = gpmc_cs_program_settings(gpmc_nand_data->cs, &s); if (err < 0) goto out_free_cs; diff --git a/arch/arm/mach-omap2/gpmc-onenand.c b/arch/arm/mach-omap2/gpmc-onenand.c index 53d197e0c1f3..f899e77ff5e6 100644 --- a/arch/arm/mach-omap2/gpmc-onenand.c +++ b/arch/arm/mach-omap2/gpmc-onenand.c @@ -293,7 +293,7 @@ static int omap2_onenand_setup_async(void __iomem *onenand_base) if (ret < 0) return ret; - ret = gpmc_cs_set_timings(gpmc_onenand_data->cs, &t); + ret = gpmc_cs_set_timings(gpmc_onenand_data->cs, &t, &onenand_async); if (ret < 0) return ret; @@ -331,7 +331,7 @@ static int omap2_onenand_setup_sync(void __iomem *onenand_base, int *freq_ptr) if (ret < 0) return ret; - ret = gpmc_cs_set_timings(gpmc_onenand_data->cs, &t); + ret = gpmc_cs_set_timings(gpmc_onenand_data->cs, &t, &onenand_sync); if (ret < 0) return ret; diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c index dc6e79c4484a..9a8611ab5dfa 100644 --- a/arch/arm/mach-omap2/hsmmc.c +++ b/arch/arm/mach-omap2/hsmmc.c @@ -150,9 +150,13 @@ static int nop_mmc_set_power(struct device *dev, int power_on, int vdd) static inline void omap_hsmmc_mux(struct omap_hsmmc_platform_data *mmc_controller, int controller_nr) { - if (gpio_is_valid(mmc_controller->switch_pin) && - (mmc_controller->switch_pin < OMAP_MAX_GPIO_LINES)) - omap_mux_init_gpio(mmc_controller->switch_pin, + if (gpio_is_valid(mmc_controller->gpio_cd) && + (mmc_controller->gpio_cd < OMAP_MAX_GPIO_LINES)) + omap_mux_init_gpio(mmc_controller->gpio_cd, + OMAP_PIN_INPUT_PULLUP); + if (gpio_is_valid(mmc_controller->gpio_cod) && + (mmc_controller->gpio_cod < OMAP_MAX_GPIO_LINES)) + omap_mux_init_gpio(mmc_controller->gpio_cod, OMAP_PIN_INPUT_PULLUP); if (gpio_is_valid(mmc_controller->gpio_wp) && (mmc_controller->gpio_wp < OMAP_MAX_GPIO_LINES)) @@ -250,15 +254,20 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c, mmc->internal_clock = !c->ext_clock; mmc->reg_offset = 0; - mmc->switch_pin = c->gpio_cd; + if (c->cover_only) { + /* detect if mobile phone cover removed */ + mmc->gpio_cd = -EINVAL; + mmc->gpio_cod = c->gpio_cd; + } else { + /* card detect pin on the mmc socket itself */ + mmc->gpio_cd = c->gpio_cd; + mmc->gpio_cod = -EINVAL; + } mmc->gpio_wp = c->gpio_wp; mmc->remux = c->remux; mmc->init_card = c->init_card; - if (c->cover_only) - mmc->cover = 1; - if (c->nonremovable) mmc->nonremovable = 1; @@ -358,7 +367,15 @@ void omap_hsmmc_late_init(struct omap2_hsmmc_info *c) if (!mmc_pdata) continue; - mmc_pdata->switch_pin = c->gpio_cd; + if (c->cover_only) { + /* detect if mobile phone cover removed */ + mmc_pdata->gpio_cd = -EINVAL; + mmc_pdata->gpio_cod = c->gpio_cd; + } else { + /* card detect pin on the mmc socket itself */ + mmc_pdata->gpio_cd = c->gpio_cd; + mmc_pdata->gpio_cod = -EINVAL; + } mmc_pdata->gpio_wp = c->gpio_wp; res = omap_device_register(pdev); diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 25f1beea453e..e3f713ffb06b 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -52,7 +52,10 @@ EXPORT_SYMBOL(omap_rev); int omap_type(void) { - u32 val = 0; + static u32 val = OMAP2_DEVICETYPE_MASK; + + if (val < OMAP2_DEVICETYPE_MASK) + return val; if (cpu_is_omap24xx()) { val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS); diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index c4871c55bd8b..820dde8b5b04 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -306,7 +306,6 @@ void __init am33xx_map_io(void) void __init omap4_map_io(void) { iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc)); - omap_barriers_init(); } #endif @@ -314,7 +313,6 @@ void __init omap4_map_io(void) void __init omap5_map_io(void) { iotable_init(omap54xx_io_desc, ARRAY_SIZE(omap54xx_io_desc)); - omap_barriers_init(); } #endif /* @@ -384,13 +382,9 @@ void __init omap2420_init_early(void) omap2_set_globals_tap(OMAP242X_CLASS, OMAP2_L4_IO_ADDRESS(0x48014000)); omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE), OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE)); - omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE), - NULL); - omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE)); - omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE), NULL); + omap2_control_base_init(); omap2xxx_check_revision(); - omap2xxx_prm_init(); - omap2xxx_cm_init(); + omap2_prcm_base_init(); omap2xxx_voltagedomains_init(); omap242x_powerdomains_init(); omap242x_clockdomains_init(); @@ -414,13 +408,9 @@ void __init omap2430_init_early(void) omap2_set_globals_tap(OMAP243X_CLASS, OMAP2_L4_IO_ADDRESS(0x4900a000)); omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE), OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE)); - omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE), - NULL); - omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE)); - omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE), NULL); + omap2_control_base_init(); omap2xxx_check_revision(); - omap2xxx_prm_init(); - omap2xxx_cm_init(); + omap2_prcm_base_init(); omap2xxx_voltagedomains_init(); omap243x_powerdomains_init(); omap243x_clockdomains_init(); @@ -448,21 +438,30 @@ void __init omap3_init_early(void) omap2_set_globals_tap(OMAP343X_CLASS, OMAP2_L4_IO_ADDRESS(0x4830A000)); omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE), OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE)); - omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE), - NULL); - omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE)); - omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), NULL); + /* XXX: remove these once OMAP3 is DT only */ + if (!of_have_populated_dt()) { + omap2_set_globals_control( + OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE)); + omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE)); + omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), + NULL); + } + omap2_control_base_init(); omap3xxx_check_revision(); omap3xxx_check_features(); - omap3xxx_prm_init(); - omap3xxx_cm_init(); + omap2_prcm_base_init(); + /* XXX: remove these once OMAP3 is DT only */ + if (!of_have_populated_dt()) { + omap3xxx_prm_init(NULL); + omap3xxx_cm_init(NULL); + } omap3xxx_voltagedomains_init(); omap3xxx_powerdomains_init(); omap3xxx_clockdomains_init(); omap3xxx_hwmod_init(); omap_hwmod_init_postsetup(); if (!of_have_populated_dt()) { - omap3_prcm_legacy_iomaps_init(); + omap3_control_legacy_iomap_init(); if (soc_is_am35xx()) omap_clk_soc_init = am35xx_clk_legacy_init; else if (cpu_is_omap3630()) @@ -549,14 +548,10 @@ void __init ti814x_init_early(void) { omap2_set_globals_tap(TI814X_CLASS, OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE)); - omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE), - NULL); - omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE)); - omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), NULL); + omap2_control_base_init(); omap3xxx_check_revision(); ti81xx_check_features(); - am33xx_prm_init(); - am33xx_cm_init(); + omap2_prcm_base_init(); omap3xxx_voltagedomains_init(); omap3xxx_powerdomains_init(); ti81xx_clockdomains_init(); @@ -570,14 +565,10 @@ void __init ti816x_init_early(void) { omap2_set_globals_tap(TI816X_CLASS, OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE)); - omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE), - NULL); - omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE)); - omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), NULL); + omap2_control_base_init(); omap3xxx_check_revision(); ti81xx_check_features(); - am33xx_prm_init(); - am33xx_cm_init(); + omap2_prcm_base_init(); omap3xxx_voltagedomains_init(); omap3xxx_powerdomains_init(); ti81xx_clockdomains_init(); @@ -593,14 +584,10 @@ void __init am33xx_init_early(void) { omap2_set_globals_tap(AM335X_CLASS, AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE)); - omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE), - NULL); - omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE)); - omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), NULL); + omap2_control_base_init(); omap3xxx_check_revision(); am33xx_check_features(); - am33xx_prm_init(); - am33xx_cm_init(); + omap2_prcm_base_init(); am33xx_powerdomains_init(); am33xx_clockdomains_init(); am33xx_hwmod_init(); @@ -619,16 +606,10 @@ void __init am43xx_init_early(void) { omap2_set_globals_tap(AM335X_CLASS, AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE)); - omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE), - NULL); - omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM43XX_PRCM_BASE)); - omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM43XX_PRCM_BASE), NULL); - omap_prm_base_init(); - omap_cm_base_init(); + omap2_control_base_init(); omap3xxx_check_revision(); am33xx_check_features(); - omap44xx_prm_init(); - omap4_cm_init(); + omap2_prcm_base_init(); am43xx_powerdomains_init(); am43xx_clockdomains_init(); am43xx_hwmod_init(); @@ -648,19 +629,12 @@ void __init omap4430_init_early(void) { omap2_set_globals_tap(OMAP443X_CLASS, OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE)); - omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE), - OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE)); - omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE)); - omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE), - OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE)); omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE)); - omap_prm_base_init(); - omap_cm_base_init(); + omap2_control_base_init(); omap4xxx_check_revision(); omap4xxx_check_features(); - omap4_cm_init(); + omap2_prcm_base_init(); omap4_pm_init_early(); - omap44xx_prm_init(); omap44xx_voltagedomains_init(); omap44xx_powerdomains_init(); omap44xx_clockdomains_init(); @@ -683,18 +657,11 @@ void __init omap5_init_early(void) { omap2_set_globals_tap(OMAP54XX_CLASS, OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE)); - omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE), - OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE)); - omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE)); - omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_AON_BASE), - OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE)); omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE)); + omap2_control_base_init(); omap4_pm_init_early(); - omap_prm_base_init(); - omap_cm_base_init(); - omap44xx_prm_init(); + omap2_prcm_base_init(); omap5xxx_check_revision(); - omap4_cm_init(); omap54xx_voltagedomains_init(); omap54xx_powerdomains_init(); omap54xx_clockdomains_init(); @@ -715,18 +682,11 @@ void __init omap5_init_late(void) void __init dra7xx_init_early(void) { omap2_set_globals_tap(-1, OMAP2_L4_IO_ADDRESS(DRA7XX_TAP_BASE)); - omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE), - OMAP2_L4_IO_ADDRESS(DRA7XX_CTRL_BASE)); - omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE)); - omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(DRA7XX_CM_CORE_AON_BASE), - OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE)); omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE)); + omap2_control_base_init(); omap4_pm_init_early(); - omap_prm_base_init(); - omap_cm_base_init(); - omap44xx_prm_init(); + omap2_prcm_base_init(); dra7xxx_check_revision(); - omap4_cm_init(); dra7xx_powerdomains_init(); dra7xx_clockdomains_init(); dra7xx_hwmod_init(); @@ -764,7 +724,11 @@ int __init omap_clk_init(void) ti_clk_init_features(); if (of_have_populated_dt()) { - ret = of_prcm_init(); + ret = omap_control_init(); + if (ret) + return ret; + + ret = omap_prcm_init(); if (ret) return ret; diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index 78064b0d4db5..176eef6ef338 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c @@ -1053,7 +1053,7 @@ static void __init omap_mux_init_list(struct omap_mux_partition *partition, struct omap_mux *entry; #ifdef CONFIG_OMAP_MUX - if (!superset->muxnames || !superset->muxnames[0]) { + if (!superset->muxnames[0]) { superset++; continue; } diff --git a/arch/arm/mach-omap2/omap-secure.h b/arch/arm/mach-omap2/omap-secure.h index dec2b05d184b..af2851fbcdf0 100644 --- a/arch/arm/mach-omap2/omap-secure.h +++ b/arch/arm/mach-omap2/omap-secure.h @@ -70,13 +70,6 @@ extern u32 rx51_secure_dispatcher(u32 idx, u32 process, u32 flag, u32 nargs, extern u32 rx51_secure_update_aux_cr(u32 set_bits, u32 clear_bits); extern u32 rx51_secure_rng_call(u32 ptr, u32 count, u32 flag); -#ifdef CONFIG_OMAP4_ERRATA_I688 -extern int omap_barrier_reserve_memblock(void); -#else -static inline void omap_barrier_reserve_memblock(void) -{ } -#endif - #ifdef CONFIG_SOC_HAS_REALTIME_COUNTER void set_cntfreq(void); #else diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wakeupgen.c index f961c46453b9..3b56722dfd8a 100644 --- a/arch/arm/mach-omap2/omap-wakeupgen.c +++ b/arch/arm/mach-omap2/omap-wakeupgen.c @@ -20,11 +20,12 @@ #include <linux/init.h> #include <linux/io.h> #include <linux/irq.h> +#include <linux/irqdomain.h> +#include <linux/of_address.h> #include <linux/platform_device.h> #include <linux/cpu.h> #include <linux/notifier.h> #include <linux/cpu_pm.h> -#include <linux/irqchip/arm-gic.h> #include "omap-wakeupgen.h" #include "omap-secure.h" @@ -78,29 +79,12 @@ static inline void sar_writel(u32 val, u32 offset, u8 idx) static inline int _wakeupgen_get_irq_info(u32 irq, u32 *bit_posn, u8 *reg_index) { - unsigned int spi_irq; - - /* - * PPIs and SGIs are not supported. - */ - if (irq < OMAP44XX_IRQ_GIC_START) - return -EINVAL; - - /* - * Subtract the GIC offset. - */ - spi_irq = irq - OMAP44XX_IRQ_GIC_START; - if (spi_irq > MAX_IRQS) { - pr_err("omap wakeupGen: Invalid IRQ%d\n", irq); - return -EINVAL; - } - /* * Each WakeupGen register controls 32 interrupt. * i.e. 1 bit per SPI IRQ */ - *reg_index = spi_irq >> 5; - *bit_posn = spi_irq %= 32; + *reg_index = irq >> 5; + *bit_posn = irq %= 32; return 0; } @@ -141,6 +125,7 @@ static void wakeupgen_mask(struct irq_data *d) raw_spin_lock_irqsave(&wakeupgen_lock, flags); _wakeupgen_clear(d->hwirq, irq_target_cpu[d->hwirq]); raw_spin_unlock_irqrestore(&wakeupgen_lock, flags); + irq_chip_mask_parent(d); } /* @@ -153,6 +138,7 @@ static void wakeupgen_unmask(struct irq_data *d) raw_spin_lock_irqsave(&wakeupgen_lock, flags); _wakeupgen_set(d->hwirq, irq_target_cpu[d->hwirq]); raw_spin_unlock_irqrestore(&wakeupgen_lock, flags); + irq_chip_unmask_parent(d); } #ifdef CONFIG_HOTPLUG_CPU @@ -400,15 +386,91 @@ int omap_secure_apis_support(void) return omap_secure_apis; } +static struct irq_chip wakeupgen_chip = { + .name = "WUGEN", + .irq_eoi = irq_chip_eoi_parent, + .irq_mask = wakeupgen_mask, + .irq_unmask = wakeupgen_unmask, + .irq_retrigger = irq_chip_retrigger_hierarchy, + .flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND, +#ifdef CONFIG_SMP + .irq_set_affinity = irq_chip_set_affinity_parent, +#endif +}; + +static int wakeupgen_domain_xlate(struct irq_domain *domain, + struct device_node *controller, + const u32 *intspec, + unsigned int intsize, + unsigned long *out_hwirq, + unsigned int *out_type) +{ + if (domain->of_node != controller) + return -EINVAL; /* Shouldn't happen, really... */ + if (intsize != 3) + return -EINVAL; /* Not GIC compliant */ + if (intspec[0] != 0) + return -EINVAL; /* No PPI should point to this domain */ + + *out_hwirq = intspec[1]; + *out_type = intspec[2]; + return 0; +} + +static int wakeupgen_domain_alloc(struct irq_domain *domain, + unsigned int virq, + unsigned int nr_irqs, void *data) +{ + struct of_phandle_args *args = data; + struct of_phandle_args parent_args; + irq_hw_number_t hwirq; + int i; + + if (args->args_count != 3) + return -EINVAL; /* Not GIC compliant */ + if (args->args[0] != 0) + return -EINVAL; /* No PPI should point to this domain */ + + hwirq = args->args[1]; + if (hwirq >= MAX_IRQS) + return -EINVAL; /* Can't deal with this */ + + for (i = 0; i < nr_irqs; i++) + irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i, + &wakeupgen_chip, NULL); + + parent_args = *args; + parent_args.np = domain->parent->of_node; + return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, &parent_args); +} + +static struct irq_domain_ops wakeupgen_domain_ops = { + .xlate = wakeupgen_domain_xlate, + .alloc = wakeupgen_domain_alloc, + .free = irq_domain_free_irqs_common, +}; + /* * Initialise the wakeupgen module. */ -int __init omap_wakeupgen_init(void) +static int __init wakeupgen_init(struct device_node *node, + struct device_node *parent) { + struct irq_domain *parent_domain, *domain; int i; unsigned int boot_cpu = smp_processor_id(); u32 val; + if (!parent) { + pr_err("%s: no parent, giving up\n", node->full_name); + return -ENODEV; + } + + parent_domain = irq_find_host(parent); + if (!parent_domain) { + pr_err("%s: unable to obtain parent domain\n", node->full_name); + return -ENXIO; + } /* Not supported on OMAP4 ES1.0 silicon */ if (omap_rev() == OMAP4430_REV_ES1_0) { WARN(1, "WakeupGen: Not supported on OMAP4430 ES1.0\n"); @@ -416,7 +478,7 @@ int __init omap_wakeupgen_init(void) } /* Static mapping, never released */ - wakeupgen_base = ioremap(OMAP_WKUPGEN_BASE, SZ_4K); + wakeupgen_base = of_iomap(node, 0); if (WARN_ON(!wakeupgen_base)) return -ENOMEM; @@ -429,6 +491,14 @@ int __init omap_wakeupgen_init(void) max_irqs = AM43XX_IRQS; } + domain = irq_domain_add_hierarchy(parent_domain, 0, max_irqs, + node, &wakeupgen_domain_ops, + NULL); + if (!domain) { + iounmap(wakeupgen_base); + return -ENOMEM; + } + /* Clear all IRQ bitmasks at wakeupGen level */ for (i = 0; i < irq_banks; i++) { wakeupgen_writel(0, i, CPU0_ID); @@ -437,14 +507,6 @@ int __init omap_wakeupgen_init(void) } /* - * Override GIC architecture specific functions to add - * OMAP WakeupGen interrupt controller along with GIC - */ - gic_arch_extn.irq_mask = wakeupgen_mask; - gic_arch_extn.irq_unmask = wakeupgen_unmask; - gic_arch_extn.flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_SKIP_SET_WAKE; - - /* * FIXME: Add support to set_smp_affinity() once the core * GIC code has necessary hooks in place. */ @@ -474,3 +536,9 @@ int __init omap_wakeupgen_init(void) return 0; } + +/* + * We cannot use the IRQCHIP_DECLARE macro that lives in + * drivers/irqchip, so we're forced to roll our own. Not very nice. + */ +OF_DECLARE_2(irqchip, ti_wakeupgen, "ti,omap4-wugen-mpu", wakeupgen_init); diff --git a/arch/arm/mach-omap2/omap-wakeupgen.h b/arch/arm/mach-omap2/omap-wakeupgen.h index b3c8eccfae79..a3491ad12368 100644 --- a/arch/arm/mach-omap2/omap-wakeupgen.h +++ b/arch/arm/mach-omap2/omap-wakeupgen.h @@ -33,7 +33,6 @@ #define OMAP_TIMESTAMPCYCLELO 0xc08 #define OMAP_TIMESTAMPCYCLEHI 0xc0c -extern int __init omap_wakeupgen_init(void); extern void __iomem *omap_get_wakeupgen_base(void); extern int omap_secure_apis_support(void); #endif diff --git a/arch/arm/mach-omap2/omap34xx.h b/arch/arm/mach-omap2/omap34xx.h index c0d1b4b1653f..ed0024dda133 100644 --- a/arch/arm/mach-omap2/omap34xx.h +++ b/arch/arm/mach-omap2/omap34xx.h @@ -46,39 +46,9 @@ #define OMAP34XX_IC_BASE 0x48200000 -#define OMAP3430_ISP_BASE (L4_34XX_BASE + 0xBC000) -#define OMAP3430_ISP_CBUFF_BASE (OMAP3430_ISP_BASE + 0x0100) -#define OMAP3430_ISP_CCP2_BASE (OMAP3430_ISP_BASE + 0x0400) -#define OMAP3430_ISP_CCDC_BASE (OMAP3430_ISP_BASE + 0x0600) -#define OMAP3430_ISP_HIST_BASE (OMAP3430_ISP_BASE + 0x0A00) -#define OMAP3430_ISP_H3A_BASE (OMAP3430_ISP_BASE + 0x0C00) -#define OMAP3430_ISP_PREV_BASE (OMAP3430_ISP_BASE + 0x0E00) -#define OMAP3430_ISP_RESZ_BASE (OMAP3430_ISP_BASE + 0x1000) -#define OMAP3430_ISP_SBL_BASE (OMAP3430_ISP_BASE + 0x1200) -#define OMAP3430_ISP_MMU_BASE (OMAP3430_ISP_BASE + 0x1400) -#define OMAP3430_ISP_CSI2A_REGS1_BASE (OMAP3430_ISP_BASE + 0x1800) -#define OMAP3430_ISP_CSIPHY2_BASE (OMAP3430_ISP_BASE + 0x1970) -#define OMAP3630_ISP_CSI2A_REGS2_BASE (OMAP3430_ISP_BASE + 0x19C0) -#define OMAP3630_ISP_CSI2C_REGS1_BASE (OMAP3430_ISP_BASE + 0x1C00) -#define OMAP3630_ISP_CSIPHY1_BASE (OMAP3430_ISP_BASE + 0x1D70) -#define OMAP3630_ISP_CSI2C_REGS2_BASE (OMAP3430_ISP_BASE + 0x1DC0) - -#define OMAP3430_ISP_END (OMAP3430_ISP_BASE + 0x06F) -#define OMAP3430_ISP_CBUFF_END (OMAP3430_ISP_CBUFF_BASE + 0x077) -#define OMAP3430_ISP_CCP2_END (OMAP3430_ISP_CCP2_BASE + 0x1EF) -#define OMAP3430_ISP_CCDC_END (OMAP3430_ISP_CCDC_BASE + 0x0A7) -#define OMAP3430_ISP_HIST_END (OMAP3430_ISP_HIST_BASE + 0x047) -#define OMAP3430_ISP_H3A_END (OMAP3430_ISP_H3A_BASE + 0x05F) -#define OMAP3430_ISP_PREV_END (OMAP3430_ISP_PREV_BASE + 0x09F) -#define OMAP3430_ISP_RESZ_END (OMAP3430_ISP_RESZ_BASE + 0x0AB) -#define OMAP3430_ISP_SBL_END (OMAP3430_ISP_SBL_BASE + 0x0FB) -#define OMAP3430_ISP_MMU_END (OMAP3430_ISP_MMU_BASE + 0x06F) -#define OMAP3430_ISP_CSI2A_REGS1_END (OMAP3430_ISP_CSI2A_REGS1_BASE + 0x16F) -#define OMAP3430_ISP_CSIPHY2_END (OMAP3430_ISP_CSIPHY2_BASE + 0x00B) -#define OMAP3630_ISP_CSI2A_REGS2_END (OMAP3630_ISP_CSI2A_REGS2_BASE + 0x3F) -#define OMAP3630_ISP_CSI2C_REGS1_END (OMAP3630_ISP_CSI2C_REGS1_BASE + 0x16F) -#define OMAP3630_ISP_CSIPHY1_END (OMAP3630_ISP_CSIPHY1_BASE + 0x00B) -#define OMAP3630_ISP_CSI2C_REGS2_END (OMAP3630_ISP_CSI2C_REGS2_BASE + 0x3F) +#define OMAP3430_ISP_BASE (L4_34XX_BASE + 0xBC000) +#define OMAP3430_ISP_MMU_BASE (OMAP3430_ISP_BASE + 0x1400) +#define OMAP3430_ISP_BASE2 (OMAP3430_ISP_BASE + 0x1800) #define OMAP34XX_HSUSB_OTG_BASE (L4_34XX_BASE + 0xAB000) #define OMAP34XX_USBTLL_BASE (L4_34XX_BASE + 0x62000) diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c index cee0fe1ee6ff..16350eefa66c 100644 --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c @@ -22,7 +22,6 @@ #include <linux/of_platform.h> #include <linux/export.h> #include <linux/irqchip/arm-gic.h> -#include <linux/irqchip/irq-crossbar.h> #include <linux/of_address.h> #include <linux/reboot.h> #include <linux/genalloc.h> @@ -52,75 +51,6 @@ static void __iomem *twd_base; #define IRQ_LOCALTIMER 29 -#ifdef CONFIG_OMAP4_ERRATA_I688 -/* Used to implement memory barrier on DRAM path */ -#define OMAP4_DRAM_BARRIER_VA 0xfe600000 - -void __iomem *dram_sync, *sram_sync; - -static phys_addr_t paddr; -static u32 size; - -void omap_bus_sync(void) -{ - if (dram_sync && sram_sync) { - writel_relaxed(readl_relaxed(dram_sync), dram_sync); - writel_relaxed(readl_relaxed(sram_sync), sram_sync); - isb(); - } -} -EXPORT_SYMBOL(omap_bus_sync); - -static int __init omap4_sram_init(void) -{ - struct device_node *np; - struct gen_pool *sram_pool; - - np = of_find_compatible_node(NULL, NULL, "ti,omap4-mpu"); - if (!np) - pr_warn("%s:Unable to allocate sram needed to handle errata I688\n", - __func__); - sram_pool = of_get_named_gen_pool(np, "sram", 0); - if (!sram_pool) - pr_warn("%s:Unable to get sram pool needed to handle errata I688\n", - __func__); - else - sram_sync = (void *)gen_pool_alloc(sram_pool, PAGE_SIZE); - - return 0; -} -omap_arch_initcall(omap4_sram_init); - -/* Steal one page physical memory for barrier implementation */ -int __init omap_barrier_reserve_memblock(void) -{ - - size = ALIGN(PAGE_SIZE, SZ_1M); - paddr = arm_memblock_steal(size, SZ_1M); - - return 0; -} - -void __init omap_barriers_init(void) -{ - struct map_desc dram_io_desc[1]; - - dram_io_desc[0].virtual = OMAP4_DRAM_BARRIER_VA; - dram_io_desc[0].pfn = __phys_to_pfn(paddr); - dram_io_desc[0].length = size; - dram_io_desc[0].type = MT_MEMORY_RW_SO; - iotable_init(dram_io_desc, ARRAY_SIZE(dram_io_desc)); - dram_sync = (void __iomem *) dram_io_desc[0].virtual; - - pr_info("OMAP4: Map 0x%08llx to 0x%08lx for dram barrier\n", - (long long) paddr, dram_io_desc[0].virtual); - -} -#else -void __init omap_barriers_init(void) -{} -#endif - void gic_dist_disable(void) { if (gic_dist_base_addr) @@ -242,26 +172,26 @@ static int __init omap4_sar_ram_init(void) } omap_early_initcall(omap4_sar_ram_init); -static const struct of_device_id gic_match[] = { - { .compatible = "arm,cortex-a9-gic", }, - { .compatible = "arm,cortex-a15-gic", }, +static const struct of_device_id intc_match[] = { + { .compatible = "ti,omap4-wugen-mpu", }, + { .compatible = "ti,omap5-wugen-mpu", }, { }, }; -static struct device_node *gic_node; +static struct device_node *intc_node; unsigned int omap4_xlate_irq(unsigned int hwirq) { struct of_phandle_args irq_data; unsigned int irq; - if (!gic_node) - gic_node = of_find_matching_node(NULL, gic_match); + if (!intc_node) + intc_node = of_find_matching_node(NULL, intc_match); - if (WARN_ON(!gic_node)) + if (WARN_ON(!intc_node)) return hwirq; - irq_data.np = gic_node; + irq_data.np = intc_node; irq_data.args_count = 3; irq_data.args[0] = 0; irq_data.args[1] = hwirq - OMAP44XX_IRQ_GIC_START; @@ -278,6 +208,12 @@ void __init omap_gic_of_init(void) { struct device_node *np; + intc_node = of_find_matching_node(NULL, intc_match); + if (WARN_ON(!intc_node)) { + pr_err("No WUGEN found in DT, system will misbehave.\n"); + pr_err("UPDATE YOUR DEVICE TREE!\n"); + } + /* Extract GIC distributor and TWD bases for OMAP4460 ROM Errata WA */ if (!cpu_is_omap446x()) goto skip_errata_init; @@ -291,9 +227,5 @@ void __init omap_gic_of_init(void) WARN_ON(!twd_base); skip_errata_init: - omap_wakeupgen_init(); -#ifdef CONFIG_IRQ_CROSSBAR - irqcrossbar_init(); -#endif irqchip_init(); } diff --git a/arch/arm/mach-omap2/omap_device.c b/arch/arm/mach-omap2/omap_device.c index be9541e18650..166b18f515a2 100644 --- a/arch/arm/mach-omap2/omap_device.c +++ b/arch/arm/mach-omap2/omap_device.c @@ -690,6 +690,9 @@ struct dev_pm_domain omap_device_pm_domain = { USE_PLATFORM_PM_SLEEP_OPS .suspend_noirq = _od_suspend_noirq, .resume_noirq = _od_resume_noirq, + .freeze_noirq = _od_suspend_noirq, + .thaw_noirq = _od_resume_noirq, + .restore_noirq = _od_resume_noirq, } }; diff --git a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c index 8eb85925e444..e2223148ba4d 100644 --- a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c @@ -20,6 +20,7 @@ #include "omap_hwmod_33xx_43xx_common_data.h" #include "prcm43xx.h" #include "omap_hwmod_common_data.h" +#include "hdq1w.h" /* IP blocks */ @@ -516,6 +517,33 @@ static struct omap_hwmod am43xx_dss_rfbi_hwmod = { .parent_hwmod = &am43xx_dss_core_hwmod, }; +/* HDQ1W */ +static struct omap_hwmod_class_sysconfig am43xx_hdq1w_sysc = { + .rev_offs = 0x0000, + .sysc_offs = 0x0014, + .syss_offs = 0x0018, + .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +static struct omap_hwmod_class am43xx_hdq1w_hwmod_class = { + .name = "hdq1w", + .sysc = &am43xx_hdq1w_sysc, + .reset = &omap_hdq1w_reset, +}; + +static struct omap_hwmod am43xx_hdq1w_hwmod = { + .name = "hdq1w", + .class = &am43xx_hdq1w_hwmod_class, + .clkdm_name = "l4ls_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = AM43XX_CM_PER_HDQ1W_CLKCTRL_OFFSET, + .modulemode = MODULEMODE_SWCTRL, + }, + }, +}; + /* Interfaces */ static struct omap_hwmod_ocp_if am43xx_l3_main__l4_hs = { .master = &am33xx_l3_main_hwmod, @@ -790,6 +818,13 @@ static struct omap_hwmod_ocp_if am43xx_l4_ls__dss_rfbi = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; +static struct omap_hwmod_ocp_if am43xx_l4_ls__hdq1w = { + .master = &am33xx_l4_ls_hwmod, + .slave = &am43xx_hdq1w_hwmod, + .clk = "l4ls_gclk", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = { &am33xx_l4_wkup__synctimer, &am43xx_l4_ls__timer8, @@ -889,6 +924,7 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = { &am43xx_l4_ls__dss, &am43xx_l4_ls__dss_dispc, &am43xx_l4_ls__dss_rfbi, + &am43xx_l4_ls__hdq1w, NULL, }; diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c index 16fe7a1b7a35..0e64c2fac0b5 100644 --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c @@ -1726,21 +1726,6 @@ static struct omap_hwmod_class dra7xx_timer_1ms_hwmod_class = { .sysc = &dra7xx_timer_1ms_sysc, }; -static struct omap_hwmod_class_sysconfig dra7xx_timer_secure_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_RESET_STATUS | - SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - SIDLE_SMART_WKUP), - .sysc_fields = &omap_hwmod_sysc_type2, -}; - -static struct omap_hwmod_class dra7xx_timer_secure_hwmod_class = { - .name = "timer", - .sysc = &dra7xx_timer_secure_sysc, -}; - static struct omap_hwmod_class_sysconfig dra7xx_timer_sysc = { .rev_offs = 0x0000, .sysc_offs = 0x0010, @@ -1804,7 +1789,7 @@ static struct omap_hwmod dra7xx_timer3_hwmod = { /* timer4 */ static struct omap_hwmod dra7xx_timer4_hwmod = { .name = "timer4", - .class = &dra7xx_timer_secure_hwmod_class, + .class = &dra7xx_timer_hwmod_class, .clkdm_name = "l4per_clkdm", .main_clk = "timer4_gfclk_mux", .prcm = { @@ -1921,6 +1906,66 @@ static struct omap_hwmod dra7xx_timer11_hwmod = { }, }; +/* timer13 */ +static struct omap_hwmod dra7xx_timer13_hwmod = { + .name = "timer13", + .class = &dra7xx_timer_hwmod_class, + .clkdm_name = "l4per3_clkdm", + .main_clk = "timer13_gfclk_mux", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4PER3_TIMER13_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4PER3_TIMER13_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, + }, + }, +}; + +/* timer14 */ +static struct omap_hwmod dra7xx_timer14_hwmod = { + .name = "timer14", + .class = &dra7xx_timer_hwmod_class, + .clkdm_name = "l4per3_clkdm", + .main_clk = "timer14_gfclk_mux", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4PER3_TIMER14_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4PER3_TIMER14_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, + }, + }, +}; + +/* timer15 */ +static struct omap_hwmod dra7xx_timer15_hwmod = { + .name = "timer15", + .class = &dra7xx_timer_hwmod_class, + .clkdm_name = "l4per3_clkdm", + .main_clk = "timer15_gfclk_mux", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4PER3_TIMER15_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4PER3_TIMER15_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, + }, + }, +}; + +/* timer16 */ +static struct omap_hwmod dra7xx_timer16_hwmod = { + .name = "timer16", + .class = &dra7xx_timer_hwmod_class, + .clkdm_name = "l4per3_clkdm", + .main_clk = "timer16_gfclk_mux", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4PER3_TIMER16_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4PER3_TIMER16_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, + }, + }, +}; + /* * 'uart' class * @@ -3059,6 +3104,38 @@ static struct omap_hwmod_ocp_if dra7xx_l4_per1__timer11 = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; +/* l4_per3 -> timer13 */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__timer13 = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_timer13_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_per3 -> timer14 */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__timer14 = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_timer14_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_per3 -> timer15 */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__timer15 = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_timer15_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_per3 -> timer16 */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__timer16 = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_timer16_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + /* l4_per1 -> uart1 */ static struct omap_hwmod_ocp_if dra7xx_l4_per1__uart1 = { .master = &dra7xx_l4_per1_hwmod, @@ -3295,6 +3372,10 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = { &dra7xx_l4_per1__timer9, &dra7xx_l4_per1__timer10, &dra7xx_l4_per1__timer11, + &dra7xx_l4_per3__timer13, + &dra7xx_l4_per3__timer14, + &dra7xx_l4_per3__timer15, + &dra7xx_l4_per3__timer16, &dra7xx_l4_per1__uart1, &dra7xx_l4_per1__uart2, &dra7xx_l4_per1__uart3, diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c index e642b079e9f3..af11511dda50 100644 --- a/arch/arm/mach-omap2/pdata-quirks.c +++ b/arch/arm/mach-omap2/pdata-quirks.c @@ -14,7 +14,6 @@ #include <linux/kernel.h> #include <linux/of_platform.h> #include <linux/ti_wilink_st.h> -#include <linux/wl12xx.h> #include <linux/platform_data/pinctrl-single.h> #include <linux/platform_data/iommu-omap.h> @@ -35,34 +34,6 @@ struct pdata_init { struct of_dev_auxdata omap_auxdata_lookup[]; static struct twl4030_gpio_platform_data twl_gpio_auxdata; -#if IS_ENABLED(CONFIG_WL12XX) - -static struct wl12xx_platform_data wl12xx __initdata; - -static void __init __used legacy_init_wl12xx(unsigned ref_clock, - unsigned tcxo_clock, - int gpio) -{ - int res; - - wl12xx.board_ref_clock = ref_clock; - wl12xx.board_tcxo_clock = tcxo_clock; - wl12xx.irq = gpio_to_irq(gpio); - - res = wl12xx_set_platform_data(&wl12xx); - if (res) { - pr_err("error setting wl12xx data: %d\n", res); - return; - } -} -#else -static inline void legacy_init_wl12xx(unsigned ref_clock, - unsigned tcxo_clock, - int gpio) -{ -} -#endif - #ifdef CONFIG_MACH_NOKIA_N8X0 static void __init omap2420_n8x0_legacy_init(void) { @@ -129,7 +100,6 @@ static void __init omap3_sbc_t3730_twl_init(void) static void __init omap3_sbc_t3730_legacy_init(void) { omap3_sbc_t3x_usb_hub_init(167, "sb-t35 usb hub"); - legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 136); } static void __init omap3_sbc_t3530_legacy_init(void) @@ -159,14 +129,12 @@ static struct platform_device btwilink_device = { static void __init omap3_igep0020_rev_f_legacy_init(void) { - legacy_init_wl12xx(0, 0, 177); platform_device_register(&wl18xx_device); platform_device_register(&btwilink_device); } static void __init omap3_igep0030_rev_g_legacy_init(void) { - legacy_init_wl12xx(0, 0, 136); platform_device_register(&wl18xx_device); platform_device_register(&btwilink_device); } @@ -174,12 +142,6 @@ static void __init omap3_igep0030_rev_g_legacy_init(void) static void __init omap3_evm_legacy_init(void) { hsmmc2_internal_input_clk(); - legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 149); -} - -static void __init omap3_zoom_legacy_init(void) -{ - legacy_init_wl12xx(WL12XX_REFCLOCK_26, 0, 162); } static void am35xx_enable_emac_int(void) @@ -246,7 +208,6 @@ static void __init omap3_sbc_t3517_legacy_init(void) am35xx_emac_reset(); hsmmc2_internal_input_clk(); omap3_sbc_t3517_wifi_init(); - legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 145); } static void __init am3517_evm_legacy_init(void) @@ -288,24 +249,6 @@ static void __init omap3_tao3530_legacy_init(void) } #endif /* CONFIG_ARCH_OMAP3 */ -#ifdef CONFIG_ARCH_OMAP4 -static void __init omap4_sdp_legacy_init(void) -{ - legacy_init_wl12xx(WL12XX_REFCLOCK_26, - WL12XX_TCXOCLOCK_26, 53); -} - -static void __init omap4_panda_legacy_init(void) -{ - legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 53); -} - -static void __init var_som_om44_legacy_init(void) -{ - legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 41); -} -#endif - #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) static struct iommu_platform_data omap4_iommu_pdata = { .reset_name = "mmu_cache", @@ -314,13 +257,6 @@ static struct iommu_platform_data omap4_iommu_pdata = { }; #endif -#ifdef CONFIG_SOC_AM33XX -static void __init am335x_evmsk_legacy_init(void) -{ - legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 31); -} -#endif - #ifdef CONFIG_SOC_OMAP5 static void __init omap5_uevm_legacy_init(void) { @@ -421,19 +357,9 @@ static struct pdata_init pdata_quirks[] __initdata = { { "isee,omap3-igep0020-rev-f", omap3_igep0020_rev_f_legacy_init, }, { "isee,omap3-igep0030-rev-g", omap3_igep0030_rev_g_legacy_init, }, { "ti,omap3-evm-37xx", omap3_evm_legacy_init, }, - { "ti,omap3-zoom3", omap3_zoom_legacy_init, }, { "ti,am3517-evm", am3517_evm_legacy_init, }, { "technexion,omap3-tao3530", omap3_tao3530_legacy_init, }, #endif -#ifdef CONFIG_ARCH_OMAP4 - { "ti,omap4-sdp", omap4_sdp_legacy_init, }, - { "ti,omap4-panda", omap4_panda_legacy_init, }, - { "variscite,var-dvk-om44", var_som_om44_legacy_init, }, - { "variscite,var-stk-om44", var_som_om44_legacy_init, }, -#endif -#ifdef CONFIG_SOC_AM33XX - { "ti,am335x-evmsk", am335x_evmsk_legacy_init, }, -#endif #ifdef CONFIG_SOC_OMAP5 { "ti,omap5-uevm", omap5_uevm_legacy_init, }, #endif diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c index fe01c5a03aa2..b1aad7e1426c 100644 --- a/arch/arm/mach-omap2/pm24xx.c +++ b/arch/arm/mach-omap2/pm24xx.c @@ -75,9 +75,9 @@ static int omap2_enter_full_retention(void) /* Clear old wake-up events */ /* REVISIT: These write to reserved bits? */ - omap2xxx_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0); - omap2xxx_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0); - omap2xxx_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, ~0); + omap_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0); + omap_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0); + omap_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, ~0); pwrdm_set_next_pwrst(core_pwrdm, PWRDM_POWER_RET); pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_RET); @@ -104,18 +104,16 @@ no_sleep: clk_enable(osc_ck); /* clear CORE wake-up events */ - omap2xxx_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0); - omap2xxx_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0); + omap_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0); + omap_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0); /* wakeup domain events - bit 1: GPT1, bit5 GPIO */ - omap2xxx_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, 0x4 | 0x1); + omap_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, 0x4 | 0x1); /* MPU domain wake events */ - omap2xxx_prm_clear_mod_irqs(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET, - 0x1); + omap_prm_clear_mod_irqs(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET, 0x1); - omap2xxx_prm_clear_mod_irqs(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET, - 0x20); + omap_prm_clear_mod_irqs(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET, 0x20); pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON); pwrdm_set_next_pwrst(core_pwrdm, PWRDM_POWER_ON); @@ -143,9 +141,9 @@ static void omap2_enter_mpu_retention(void) * it is in retention mode. */ if (omap2_allow_mpu_retention()) { /* REVISIT: These write to reserved bits? */ - omap2xxx_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0); - omap2xxx_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0); - omap2xxx_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, ~0); + omap_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0); + omap_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0); + omap_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, ~0); /* Try to enter MPU retention */ pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_RET); diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 88721df6001d..87b98bf92366 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -137,9 +137,8 @@ static irqreturn_t _prcm_int_handle_io(int irq, void *unused) { int c; - c = omap3xxx_prm_clear_mod_irqs(WKUP_MOD, 1, - ~(OMAP3430_ST_IO_MASK | - OMAP3430_ST_IO_CHAIN_MASK)); + c = omap_prm_clear_mod_irqs(WKUP_MOD, 1, OMAP3430_ST_IO_MASK | + OMAP3430_ST_IO_CHAIN_MASK); return c ? IRQ_HANDLED : IRQ_NONE; } @@ -153,14 +152,13 @@ static irqreturn_t _prcm_int_handle_wakeup(int irq, void *unused) * these are handled in a separate handler to avoid acking * IO events before parsing in mux code */ - c = omap3xxx_prm_clear_mod_irqs(WKUP_MOD, 1, - OMAP3430_ST_IO_MASK | - OMAP3430_ST_IO_CHAIN_MASK); - c += omap3xxx_prm_clear_mod_irqs(CORE_MOD, 1, 0); - c += omap3xxx_prm_clear_mod_irqs(OMAP3430_PER_MOD, 1, 0); + c = omap_prm_clear_mod_irqs(WKUP_MOD, 1, ~(OMAP3430_ST_IO_MASK | + OMAP3430_ST_IO_CHAIN_MASK)); + c += omap_prm_clear_mod_irqs(CORE_MOD, 1, ~0); + c += omap_prm_clear_mod_irqs(OMAP3430_PER_MOD, 1, ~0); if (omap_rev() > OMAP3430_REV_ES1_0) { - c += omap3xxx_prm_clear_mod_irqs(CORE_MOD, 3, 0); - c += omap3xxx_prm_clear_mod_irqs(OMAP3430ES2_USBHOST_MOD, 1, 0); + c += omap_prm_clear_mod_irqs(CORE_MOD, 3, ~0); + c += omap_prm_clear_mod_irqs(OMAP3430ES2_USBHOST_MOD, 1, ~0); } return c ? IRQ_HANDLED : IRQ_NONE; diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h index 6163d66102a3..6ae0b3a1781e 100644 --- a/arch/arm/mach-omap2/prcm-common.h +++ b/arch/arm/mach-omap2/prcm-common.h @@ -518,6 +518,26 @@ struct omap_prcm_irq_setup { .priority = _priority \ } +/** + * struct omap_prcm_init_data - PRCM driver init data + * @index: clock memory mapping index to be used + * @mem: IO mem pointer for this module + * @offset: module base address offset from the IO base + * @flags: PRCM module init flags + * @device_inst_offset: device instance offset within the module address space + * @init: low level PRCM init function for this module + * @np: device node for this PRCM module + */ +struct omap_prcm_init_data { + int index; + void __iomem *mem; + s16 offset; + u16 flags; + s32 device_inst_offset; + int (*init)(const struct omap_prcm_init_data *data); + struct device_node *np; +}; + extern void omap_prcm_irq_cleanup(void); extern int omap_prcm_register_chain_handler( struct omap_prcm_irq_setup *irq_setup); diff --git a/arch/arm/mach-omap2/prcm43xx.h b/arch/arm/mach-omap2/prcm43xx.h index ad7b3e9977f8..48df3b55057e 100644 --- a/arch/arm/mach-omap2/prcm43xx.h +++ b/arch/arm/mach-omap2/prcm43xx.h @@ -143,5 +143,6 @@ #define AM43XX_CM_PER_USB_OTG_SS1_CLKCTRL_OFFSET 0x0268 #define AM43XX_CM_PER_USBPHYOCP2SCP1_CLKCTRL_OFFSET 0x05C0 #define AM43XX_CM_PER_DSS_CLKCTRL_OFFSET 0x0a20 +#define AM43XX_CM_PER_HDQ1W_CLKCTRL_OFFSET 0x04a0 #endif diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h index b9061a6a2db8..233bc84fbc0e 100644 --- a/arch/arm/mach-omap2/prm.h +++ b/arch/arm/mach-omap2/prm.h @@ -19,8 +19,9 @@ extern void __iomem *prm_base; extern u16 prm_features; extern void omap2_set_globals_prm(void __iomem *prm); -int of_prcm_init(void); -void omap3_prcm_legacy_iomaps_init(void); +int omap_prcm_init(void); +int omap2_prm_base_init(void); +int omap2_prcm_base_init(void); # endif /* @@ -28,9 +29,11 @@ void omap3_prcm_legacy_iomaps_init(void); * * PRM_HAS_IO_WAKEUP: has IO wakeup capability * PRM_HAS_VOLTAGE: has voltage domains + * PRM_IRQ_DEFAULT: use default irq number for PRM irq */ -#define PRM_HAS_IO_WAKEUP (1 << 0) -#define PRM_HAS_VOLTAGE (1 << 1) +#define PRM_HAS_IO_WAKEUP BIT(0) +#define PRM_HAS_VOLTAGE BIT(1) +#define PRM_IRQ_DEFAULT BIT(2) /* * MAX_MODULE_SOFTRESET_WAIT: Maximum microseconds to wait for OMAP @@ -146,6 +149,9 @@ struct prm_ll_data { int (*is_hardreset_asserted)(u8 shift, u8 part, s16 prm_mod, u16 offset); void (*reset_system)(void); + int (*clear_mod_irqs)(s16 module, u8 regs, u32 wkst_mask); + u32 (*vp_check_txdone)(u8 vp_id); + void (*vp_clear_txdone)(u8 vp_id); }; extern int prm_register(struct prm_ll_data *pld); @@ -161,6 +167,19 @@ extern void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx); void omap_prm_reset_system(void); void omap_prm_reconfigure_io_chain(void); +int omap_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask); + +/* + * Voltage Processor (VP) identifiers + */ +#define OMAP3_VP_VDD_MPU_ID 0 +#define OMAP3_VP_VDD_CORE_ID 1 +#define OMAP4_VP_VDD_CORE_ID 0 +#define OMAP4_VP_VDD_IVA_ID 1 +#define OMAP4_VP_VDD_MPU_ID 2 + +u32 omap_prm_vp_check_txdone(u8 vp_id); +void omap_prm_vp_clear_txdone(u8 vp_id); #endif diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c index af0f15278fc2..752018ce129c 100644 --- a/arch/arm/mach-omap2/prm2xxx.c +++ b/arch/arm/mach-omap2/prm2xxx.c @@ -123,13 +123,14 @@ static void omap2xxx_prm_dpll_reset(void) * Clears wakeup status bits for a given module, so that the device can * re-enter idle. */ -void omap2xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask) +static int omap2xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask) { u32 wkst; wkst = omap2_prm_read_mod_reg(module, regs); wkst &= wkst_mask; omap2_prm_write_mod_reg(wkst, module, regs); + return 0; } int omap2xxx_clkdm_sleep(struct clockdomain *clkdm) @@ -216,9 +217,10 @@ static struct prm_ll_data omap2xxx_prm_ll_data = { .deassert_hardreset = &omap2_prm_deassert_hardreset, .is_hardreset_asserted = &omap2_prm_is_hardreset_asserted, .reset_system = &omap2xxx_prm_dpll_reset, + .clear_mod_irqs = &omap2xxx_prm_clear_mod_irqs, }; -int __init omap2xxx_prm_init(void) +int __init omap2xxx_prm_init(const struct omap_prcm_init_data *data) { return prm_register(&omap2xxx_prm_ll_data); } diff --git a/arch/arm/mach-omap2/prm2xxx.h b/arch/arm/mach-omap2/prm2xxx.h index 1d51643062f7..9008a9e55a1a 100644 --- a/arch/arm/mach-omap2/prm2xxx.h +++ b/arch/arm/mach-omap2/prm2xxx.h @@ -124,9 +124,7 @@ extern int omap2xxx_clkdm_sleep(struct clockdomain *clkdm); extern int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm); -void omap2xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask); - -extern int __init omap2xxx_prm_init(void); +int __init omap2xxx_prm_init(const struct omap_prcm_init_data *data); #endif diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c index 02f628601b09..dcb5001d77da 100644 --- a/arch/arm/mach-omap2/prm33xx.c +++ b/arch/arm/mach-omap2/prm33xx.c @@ -378,7 +378,7 @@ static struct prm_ll_data am33xx_prm_ll_data = { .reset_system = am33xx_prm_global_warm_sw_reset, }; -int __init am33xx_prm_init(void) +int __init am33xx_prm_init(const struct omap_prcm_init_data *data) { return prm_register(&am33xx_prm_ll_data); } diff --git a/arch/arm/mach-omap2/prm33xx.h b/arch/arm/mach-omap2/prm33xx.h index 98ac41f271da..2bc4ec52ba78 100644 --- a/arch/arm/mach-omap2/prm33xx.h +++ b/arch/arm/mach-omap2/prm33xx.h @@ -118,7 +118,7 @@ #define AM33XX_PM_CEFUSE_PWRSTST AM33XX_PRM_REGADDR(AM33XX_PRM_CEFUSE_MOD, 0x0004) #ifndef __ASSEMBLER__ -int am33xx_prm_init(void); +int am33xx_prm_init(const struct omap_prcm_init_data *data); #endif /* ASSEMBLER */ #endif diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c index 5713bbdf83bc..62680aad2126 100644 --- a/arch/arm/mach-omap2/prm3xxx.c +++ b/arch/arm/mach-omap2/prm3xxx.c @@ -29,6 +29,7 @@ #include "prm-regbits-34xx.h" #include "cm3xxx.h" #include "cm-regbits-34xx.h" +#include "clock.h" static void omap3xxx_prm_read_pending_irqs(unsigned long *events); static void omap3xxx_prm_ocp_barrier(void); @@ -96,7 +97,7 @@ static struct omap3_vp omap3_vp[] = { #define MAX_VP_ID ARRAY_SIZE(omap3_vp); -u32 omap3_prm_vp_check_txdone(u8 vp_id) +static u32 omap3_prm_vp_check_txdone(u8 vp_id) { struct omap3_vp *vp = &omap3_vp[vp_id]; u32 irqstatus; @@ -106,7 +107,7 @@ u32 omap3_prm_vp_check_txdone(u8 vp_id) return irqstatus & vp->tranxdone_status; } -void omap3_prm_vp_clear_txdone(u8 vp_id) +static void omap3_prm_vp_clear_txdone(u8 vp_id) { struct omap3_vp *vp = &omap3_vp[vp_id]; @@ -217,7 +218,7 @@ static void omap3xxx_prm_restore_irqen(u32 *saved_mask) * omap3xxx_prm_clear_mod_irqs - clear wake-up events from PRCM interrupt * @module: PRM module to clear wakeups from * @regs: register set to clear, 1 or 3 - * @ignore_bits: wakeup status bits to ignore + * @wkst_mask: wkst bits to clear * * The purpose of this function is to clear any wake-up events latched * in the PRCM PM_WKST_x registers. It is possible that a wake-up event @@ -226,7 +227,7 @@ static void omap3xxx_prm_restore_irqen(u32 *saved_mask) * that any peripheral wake-up events occurring while attempting to * clear the PM_WKST_x are detected and cleared. */ -int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 ignore_bits) +static int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask) { u32 wkst, fclk, iclk, clken; u16 wkst_off = (regs == 3) ? OMAP3430ES2_PM_WKST3 : PM_WKST1; @@ -238,7 +239,7 @@ int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 ignore_bits) wkst = omap2_prm_read_mod_reg(module, wkst_off); wkst &= omap2_prm_read_mod_reg(module, grpsel_off); - wkst &= ~ignore_bits; + wkst &= wkst_mask; if (wkst) { iclk = omap2_cm_read_mod_reg(module, iclk_off); fclk = omap2_cm_read_mod_reg(module, fclk_off); @@ -254,7 +255,7 @@ int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 ignore_bits) omap2_cm_set_mod_reg_bits(clken, module, fclk_off); omap2_prm_write_mod_reg(wkst, module, wkst_off); wkst = omap2_prm_read_mod_reg(module, wkst_off); - wkst &= ~ignore_bits; + wkst &= wkst_mask; c++; } omap2_cm_write_mod_reg(iclk, module, iclk_off); @@ -664,10 +665,15 @@ static struct prm_ll_data omap3xxx_prm_ll_data = { .deassert_hardreset = &omap2_prm_deassert_hardreset, .is_hardreset_asserted = &omap2_prm_is_hardreset_asserted, .reset_system = &omap3xxx_prm_dpll3_reset, + .clear_mod_irqs = &omap3xxx_prm_clear_mod_irqs, + .vp_check_txdone = &omap3_prm_vp_check_txdone, + .vp_clear_txdone = &omap3_prm_vp_clear_txdone, }; -int __init omap3xxx_prm_init(void) +int __init omap3xxx_prm_init(const struct omap_prcm_init_data *data) { + omap2_clk_legacy_provider_init(TI_CLKM_PRM, + prm_base + OMAP3430_IVA2_MOD); if (omap3_has_io_wakeup()) prm_features |= PRM_HAS_IO_WAKEUP; diff --git a/arch/arm/mach-omap2/prm3xxx.h b/arch/arm/mach-omap2/prm3xxx.h index ed8a3d8b739a..5f095eec339c 100644 --- a/arch/arm/mach-omap2/prm3xxx.h +++ b/arch/arm/mach-omap2/prm3xxx.h @@ -132,10 +132,6 @@ #ifndef __ASSEMBLER__ -/* OMAP3-specific VP functions */ -u32 omap3_prm_vp_check_txdone(u8 vp_id); -void omap3_prm_vp_clear_txdone(u8 vp_id); - /* * OMAP3 access functions for voltage controller (VC) and * voltage proccessor (VP) in the PRM. @@ -144,8 +140,7 @@ extern u32 omap3_prm_vcvp_read(u8 offset); extern void omap3_prm_vcvp_write(u32 val, u8 offset); extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); -extern int __init omap3xxx_prm_init(void); -int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 ignore_bits); +int __init omap3xxx_prm_init(const struct omap_prcm_init_data *data); void omap3xxx_prm_iva_idle(void); void omap3_prm_reset_modem(void); int omap3xxx_prm_clear_global_cold_reset(void); diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index d6d6bc39e05c..4541700f743a 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -138,7 +138,7 @@ static struct omap4_vp omap4_vp[] = { }, }; -u32 omap4_prm_vp_check_txdone(u8 vp_id) +static u32 omap4_prm_vp_check_txdone(u8 vp_id) { struct omap4_vp *vp = &omap4_vp[vp_id]; u32 irqstatus; @@ -149,7 +149,7 @@ u32 omap4_prm_vp_check_txdone(u8 vp_id) return irqstatus & vp->tranxdone_status; } -void omap4_prm_vp_clear_txdone(u8 vp_id) +static void omap4_prm_vp_clear_txdone(u8 vp_id) { struct omap4_vp *vp = &omap4_vp[vp_id]; @@ -699,29 +699,31 @@ static struct prm_ll_data omap44xx_prm_ll_data = { .deassert_hardreset = omap4_prminst_deassert_hardreset, .is_hardreset_asserted = omap4_prminst_is_hardreset_asserted, .reset_system = omap4_prminst_global_warm_sw_reset, + .vp_check_txdone = omap4_prm_vp_check_txdone, + .vp_clear_txdone = omap4_prm_vp_clear_txdone, }; -int __init omap44xx_prm_init(void) +static const struct omap_prcm_init_data *prm_init_data; + +int __init omap44xx_prm_init(const struct omap_prcm_init_data *data) { - if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) + omap_prm_base_init(); + + prm_init_data = data; + + if (data->flags & PRM_HAS_IO_WAKEUP) prm_features |= PRM_HAS_IO_WAKEUP; - if (!soc_is_dra7xx()) + if (data->flags & PRM_HAS_VOLTAGE) prm_features |= PRM_HAS_VOLTAGE; + omap4_prminst_set_prm_dev_inst(data->device_inst_offset); + return prm_register(&omap44xx_prm_ll_data); } -static const struct of_device_id omap_prm_dt_match_table[] = { - { .compatible = "ti,omap4-prm" }, - { .compatible = "ti,omap5-prm" }, - { .compatible = "ti,dra7-prm" }, - { } -}; - static int omap44xx_prm_late_init(void) { - struct device_node *np; int irq_num; if (!(prm_features & PRM_HAS_IO_WAKEUP)) @@ -731,31 +733,23 @@ static int omap44xx_prm_late_init(void) if (!of_have_populated_dt()) return 0; - np = of_find_matching_node(NULL, omap_prm_dt_match_table); - - if (!np) { - /* Default loaded up with OMAP4 values */ - if (!cpu_is_omap44xx()) - return 0; - } else { - irq_num = of_irq_get(np, 0); - /* - * Already have OMAP4 IRQ num. For all other platforms, we need - * IRQ numbers from DT - */ - if (irq_num < 0 && !cpu_is_omap44xx()) { - if (irq_num == -EPROBE_DEFER) - return irq_num; - - /* Have nothing to do */ - return 0; - } - - /* Once OMAP4 DT is filled as well */ - if (irq_num >= 0) { - omap4_prcm_irq_setup.irq = irq_num; - omap4_prcm_irq_setup.xlate_irq = NULL; - } + irq_num = of_irq_get(prm_init_data->np, 0); + /* + * Already have OMAP4 IRQ num. For all other platforms, we need + * IRQ numbers from DT + */ + if (irq_num < 0 && !(prm_init_data->flags & PRM_IRQ_DEFAULT)) { + if (irq_num == -EPROBE_DEFER) + return irq_num; + + /* Have nothing to do */ + return 0; + } + + /* Once OMAP4 DT is filled as well */ + if (irq_num >= 0) { + omap4_prcm_irq_setup.irq = irq_num; + omap4_prcm_irq_setup.xlate_irq = NULL; } omap44xx_prm_enable_io_wakeup(); diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h index 7db2422faa16..efd6035d0871 100644 --- a/arch/arm/mach-omap2/prm44xx.h +++ b/arch/arm/mach-omap2/prm44xx.h @@ -26,7 +26,6 @@ #define __ARCH_ARM_MACH_OMAP2_PRM44XX_H #include "prm44xx_54xx.h" -#include "prcm-common.h" #include "prm.h" #define OMAP4430_PRM_BASE 0x4a306000 diff --git a/arch/arm/mach-omap2/prm44xx_54xx.h b/arch/arm/mach-omap2/prm44xx_54xx.h index 714329565b90..3f139ebc8398 100644 --- a/arch/arm/mach-omap2/prm44xx_54xx.h +++ b/arch/arm/mach-omap2/prm44xx_54xx.h @@ -23,13 +23,11 @@ #ifndef __ARCH_ARM_MACH_OMAP2_PRM44XX_54XX_H #define __ARCH_ARM_MACH_OMAP2_PRM44XX_54XX_H +#include "prcm-common.h" + /* Function prototypes */ #ifndef __ASSEMBLER__ -/* OMAP4/OMAP5-specific VP functions */ -u32 omap4_prm_vp_check_txdone(u8 vp_id); -void omap4_prm_vp_clear_txdone(u8 vp_id); - /* * OMAP4/OMAP5 access functions for voltage controller (VC) and * voltage proccessor (VP) in the PRM. @@ -38,7 +36,7 @@ extern u32 omap4_prm_vcvp_read(u8 offset); extern void omap4_prm_vcvp_write(u32 val, u8 offset); extern u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); -extern int __init omap44xx_prm_init(void); +int __init omap44xx_prm_init(const struct omap_prcm_init_data *data); #endif diff --git a/arch/arm/mach-omap2/prm54xx.h b/arch/arm/mach-omap2/prm54xx.h index e4411010309c..1eb22ff087dc 100644 --- a/arch/arm/mach-omap2/prm54xx.h +++ b/arch/arm/mach-omap2/prm54xx.h @@ -22,7 +22,6 @@ #define __ARCH_ARM_MACH_OMAP2_PRM54XX_H #include "prm44xx_54xx.h" -#include "prcm-common.h" #include "prm.h" #define OMAP54XX_PRM_BASE 0x4ae06000 diff --git a/arch/arm/mach-omap2/prm7xx.h b/arch/arm/mach-omap2/prm7xx.h index 4bb50fbf29be..cc1e6a2b97f6 100644 --- a/arch/arm/mach-omap2/prm7xx.h +++ b/arch/arm/mach-omap2/prm7xx.h @@ -22,8 +22,8 @@ #ifndef __ARCH_ARM_MACH_OMAP2_PRM7XX_H #define __ARCH_ARM_MACH_OMAP2_PRM7XX_H -#include "prm44xx_54xx.h" #include "prcm-common.h" +#include "prm44xx_54xx.h" #include "prm.h" #define DRA7XX_PRM_BASE 0x4ae06000 diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index bfaa7ba595cc..7add7994dbfc 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c @@ -32,7 +32,11 @@ #include "prm2xxx_3xxx.h" #include "prm2xxx.h" #include "prm3xxx.h" +#include "prm33xx.h" #include "prm44xx.h" +#include "prm54xx.h" +#include "prm7xx.h" +#include "prcm43xx.h" #include "common.h" #include "clock.h" #include "cm.h" @@ -534,6 +538,61 @@ void omap_prm_reset_system(void) } /** + * omap_prm_clear_mod_irqs - clear wake-up events from PRCM interrupt + * @module: PRM module to clear wakeups from + * @regs: register to clear + * @wkst_mask: wkst bits to clear + * + * Clears any wakeup events for the module and register set defined. + * Uses SoC specific implementation to do the actual wakeup status + * clearing. + */ +int omap_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask) +{ + if (!prm_ll_data->clear_mod_irqs) { + WARN_ONCE(1, "prm: %s: no mapping function defined\n", + __func__); + return -EINVAL; + } + + return prm_ll_data->clear_mod_irqs(module, regs, wkst_mask); +} + +/** + * omap_prm_vp_check_txdone - check voltage processor TX done status + * + * Checks if voltage processor transmission has been completed. + * Returns non-zero if a transmission has completed, 0 otherwise. + */ +u32 omap_prm_vp_check_txdone(u8 vp_id) +{ + if (!prm_ll_data->vp_check_txdone) { + WARN_ONCE(1, "prm: %s: no mapping function defined\n", + __func__); + return 0; + } + + return prm_ll_data->vp_check_txdone(vp_id); +} + +/** + * omap_prm_vp_clear_txdone - clears voltage processor TX done status + * + * Clears the status bit for completed voltage processor transmission + * returned by prm_vp_check_txdone. + */ +void omap_prm_vp_clear_txdone(u8 vp_id) +{ + if (!prm_ll_data->vp_clear_txdone) { + WARN_ONCE(1, "prm: %s: no mapping function defined\n", + __func__); + return; + } + + prm_ll_data->vp_clear_txdone(vp_id); +} + +/** * prm_register - register per-SoC low-level data with the PRM * @pld: low-level per-SoC OMAP PRM data & function pointers to register * @@ -578,78 +637,175 @@ int prm_unregister(struct prm_ll_data *pld) return 0; } -static const struct of_device_id omap_prcm_dt_match_table[] = { - { .compatible = "ti,am3-prcm" }, - { .compatible = "ti,am3-scrm" }, - { .compatible = "ti,am4-prcm" }, - { .compatible = "ti,am4-scrm" }, - { .compatible = "ti,dm814-prcm" }, - { .compatible = "ti,dm814-scrm" }, - { .compatible = "ti,dm816-prcm" }, - { .compatible = "ti,dm816-scrm" }, - { .compatible = "ti,omap2-prcm" }, - { .compatible = "ti,omap2-scrm" }, - { .compatible = "ti,omap3-prm" }, - { .compatible = "ti,omap3-cm" }, - { .compatible = "ti,omap3-scrm" }, - { .compatible = "ti,omap4-cm1" }, - { .compatible = "ti,omap4-prm" }, - { .compatible = "ti,omap4-cm2" }, - { .compatible = "ti,omap4-scrm" }, - { .compatible = "ti,omap5-prm" }, - { .compatible = "ti,omap5-cm-core-aon" }, - { .compatible = "ti,omap5-scrm" }, - { .compatible = "ti,omap5-cm-core" }, - { .compatible = "ti,dra7-prm" }, - { .compatible = "ti,dra7-cm-core-aon" }, - { .compatible = "ti,dra7-cm-core" }, - { } +#ifdef CONFIG_ARCH_OMAP2 +static struct omap_prcm_init_data omap2_prm_data __initdata = { + .index = TI_CLKM_PRM, + .init = omap2xxx_prm_init, }; +#endif + +#ifdef CONFIG_ARCH_OMAP3 +static struct omap_prcm_init_data omap3_prm_data __initdata = { + .index = TI_CLKM_PRM, + .init = omap3xxx_prm_init, -static struct clk_hw_omap memmap_dummy_ck = { - .flags = MEMMAP_ADDRESSING, + /* + * IVA2 offset is a negative value, must offset the prm_base + * address by this to get it to positive + */ + .offset = -OMAP3430_IVA2_MOD, }; +#endif -static u32 prm_clk_readl(void __iomem *reg) -{ - return omap2_clk_readl(&memmap_dummy_ck, reg); -} +#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_TI81XX) +static struct omap_prcm_init_data am3_prm_data __initdata = { + .index = TI_CLKM_PRM, + .init = am33xx_prm_init, +}; +#endif + +#ifdef CONFIG_ARCH_OMAP4 +static struct omap_prcm_init_data omap4_prm_data __initdata = { + .index = TI_CLKM_PRM, + .init = omap44xx_prm_init, + .device_inst_offset = OMAP4430_PRM_DEVICE_INST, + .flags = PRM_HAS_IO_WAKEUP | PRM_HAS_VOLTAGE | PRM_IRQ_DEFAULT, +}; +#endif + +#ifdef CONFIG_SOC_OMAP5 +static struct omap_prcm_init_data omap5_prm_data __initdata = { + .index = TI_CLKM_PRM, + .init = omap44xx_prm_init, + .device_inst_offset = OMAP54XX_PRM_DEVICE_INST, + .flags = PRM_HAS_IO_WAKEUP | PRM_HAS_VOLTAGE, +}; +#endif + +#ifdef CONFIG_SOC_DRA7XX +static struct omap_prcm_init_data dra7_prm_data __initdata = { + .index = TI_CLKM_PRM, + .init = omap44xx_prm_init, + .device_inst_offset = DRA7XX_PRM_DEVICE_INST, + .flags = PRM_HAS_IO_WAKEUP, +}; +#endif -static void prm_clk_writel(u32 val, void __iomem *reg) -{ - omap2_clk_writel(val, &memmap_dummy_ck, reg); -} +#ifdef CONFIG_SOC_AM43XX +static struct omap_prcm_init_data am4_prm_data __initdata = { + .index = TI_CLKM_PRM, + .init = omap44xx_prm_init, + .device_inst_offset = AM43XX_PRM_DEVICE_INST, +}; +#endif -static struct ti_clk_ll_ops omap_clk_ll_ops = { - .clk_readl = prm_clk_readl, - .clk_writel = prm_clk_writel, +#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) +static struct omap_prcm_init_data scrm_data __initdata = { + .index = TI_CLKM_SCRM, +}; +#endif + +static const struct of_device_id omap_prcm_dt_match_table[] __initconst = { +#ifdef CONFIG_SOC_AM33XX + { .compatible = "ti,am3-prcm", .data = &am3_prm_data }, +#endif +#ifdef CONFIG_SOC_AM43XX + { .compatible = "ti,am4-prcm", .data = &am4_prm_data }, +#endif +#ifdef CONFIG_SOC_TI81XX + { .compatible = "ti,dm814-prcm", .data = &am3_prm_data }, + { .compatible = "ti,dm816-prcm", .data = &am3_prm_data }, +#endif +#ifdef CONFIG_ARCH_OMAP2 + { .compatible = "ti,omap2-prcm", .data = &omap2_prm_data }, +#endif +#ifdef CONFIG_ARCH_OMAP3 + { .compatible = "ti,omap3-prm", .data = &omap3_prm_data }, +#endif +#ifdef CONFIG_ARCH_OMAP4 + { .compatible = "ti,omap4-prm", .data = &omap4_prm_data }, + { .compatible = "ti,omap4-scrm", .data = &scrm_data }, +#endif +#ifdef CONFIG_SOC_OMAP5 + { .compatible = "ti,omap5-prm", .data = &omap5_prm_data }, + { .compatible = "ti,omap5-scrm", .data = &scrm_data }, +#endif +#ifdef CONFIG_SOC_DRA7XX + { .compatible = "ti,dra7-prm", .data = &dra7_prm_data }, +#endif + { } }; -int __init of_prcm_init(void) +/** + * omap2_prm_base_init - initialize iomappings for the PRM driver + * + * Detects and initializes the iomappings for the PRM driver, based + * on the DT data. Returns 0 in success, negative error value + * otherwise. + */ +int __init omap2_prm_base_init(void) { struct device_node *np; + const struct of_device_id *match; + struct omap_prcm_init_data *data; void __iomem *mem; - int memmap_index = 0; - ti_clk_ll_ops = &omap_clk_ll_ops; + for_each_matching_node_and_match(np, omap_prcm_dt_match_table, &match) { + data = (struct omap_prcm_init_data *)match->data; - for_each_matching_node(np, omap_prcm_dt_match_table) { mem = of_iomap(np, 0); - clk_memmaps[memmap_index] = mem; - ti_dt_clk_init_provider(np, memmap_index); - memmap_index++; + if (!mem) + return -ENOMEM; + + if (data->index == TI_CLKM_PRM) + prm_base = mem + data->offset; + + data->mem = mem; + + data->np = np; + + if (data->init) + data->init(data); } return 0; } -void __init omap3_prcm_legacy_iomaps_init(void) +int __init omap2_prcm_base_init(void) { - ti_clk_ll_ops = &omap_clk_ll_ops; + int ret; - clk_memmaps[TI_CLKM_CM] = cm_base + OMAP3430_IVA2_MOD; - clk_memmaps[TI_CLKM_PRM] = prm_base + OMAP3430_IVA2_MOD; - clk_memmaps[TI_CLKM_SCRM] = omap_ctrl_base_get(); + ret = omap2_prm_base_init(); + if (ret) + return ret; + + return omap2_cm_base_init(); +} + +/** + * omap_prcm_init - low level init for the PRCM drivers + * + * Initializes the low level clock infrastructure for PRCM drivers. + * Returns 0 in success, negative error value in failure. + */ +int __init omap_prcm_init(void) +{ + struct device_node *np; + const struct of_device_id *match; + const struct omap_prcm_init_data *data; + int ret; + + for_each_matching_node_and_match(np, omap_prcm_dt_match_table, &match) { + data = match->data; + + ret = omap2_clk_provider_init(np, data->index, NULL, data->mem); + if (ret) + return ret; + } + + omap_cm_init(); + + return 0; } static int __init prm_late_init(void) diff --git a/arch/arm/mach-omap2/prminst44xx.c b/arch/arm/mach-omap2/prminst44xx.c index 8adf7b1a1dce..c4859c4d3646 100644 --- a/arch/arm/mach-omap2/prminst44xx.c +++ b/arch/arm/mach-omap2/prminst44xx.c @@ -47,22 +47,14 @@ void omap_prm_base_init(void) s32 omap4_prmst_get_prm_dev_inst(void) { - if (prm_dev_inst != PRM_INSTANCE_UNKNOWN) - return prm_dev_inst; - - /* This cannot be done way early at boot.. as things are not setup */ - if (cpu_is_omap44xx()) - prm_dev_inst = OMAP4430_PRM_DEVICE_INST; - else if (soc_is_omap54xx()) - prm_dev_inst = OMAP54XX_PRM_DEVICE_INST; - else if (soc_is_dra7xx()) - prm_dev_inst = DRA7XX_PRM_DEVICE_INST; - else if (soc_is_am43xx()) - prm_dev_inst = AM43XX_PRM_DEVICE_INST; - return prm_dev_inst; } +void omap4_prminst_set_prm_dev_inst(s32 dev_inst) +{ + prm_dev_inst = dev_inst; +} + /* Read a register in a PRM instance */ u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx) { diff --git a/arch/arm/mach-omap2/prminst44xx.h b/arch/arm/mach-omap2/prminst44xx.h index fb1c9d7a2f9d..0c03d0731d7f 100644 --- a/arch/arm/mach-omap2/prminst44xx.h +++ b/arch/arm/mach-omap2/prminst44xx.h @@ -14,6 +14,7 @@ #define PRM_INSTANCE_UNKNOWN -1 extern s32 omap4_prmst_get_prm_dev_inst(void); +void omap4_prminst_set_prm_dev_inst(s32 dev_inst); /* * In an ideal world, we would not export these low-level functions, diff --git a/arch/arm/mach-omap2/sleep44xx.S b/arch/arm/mach-omap2/sleep44xx.S index b84a0122d823..ad1bb9431e94 100644 --- a/arch/arm/mach-omap2/sleep44xx.S +++ b/arch/arm/mach-omap2/sleep44xx.S @@ -333,11 +333,9 @@ ENDPROC(omap4_cpu_resume) #endif /* defined(CONFIG_SMP) && defined(CONFIG_PM) */ -#ifndef CONFIG_OMAP4_ERRATA_I688 ENTRY(omap_bus_sync) ret lr ENDPROC(omap_bus_sync) -#endif ENTRY(omap_do_wfi) stmfd sp!, {lr} diff --git a/arch/arm/mach-omap2/usb-tusb6010.c b/arch/arm/mach-omap2/usb-tusb6010.c index 8333400898fb..e554d9e66a1c 100644 --- a/arch/arm/mach-omap2/usb-tusb6010.c +++ b/arch/arm/mach-omap2/usb-tusb6010.c @@ -71,7 +71,7 @@ static int tusb_set_async_mode(unsigned sysclk_ps) gpmc_calc_timings(&t, &tusb_async, &dev_t); - return gpmc_cs_set_timings(async_cs, &t); + return gpmc_cs_set_timings(async_cs, &t, &tusb_async); } static int tusb_set_sync_mode(unsigned sysclk_ps) @@ -98,7 +98,7 @@ static int tusb_set_sync_mode(unsigned sysclk_ps) gpmc_calc_timings(&t, &tusb_sync, &dev_t); - return gpmc_cs_set_timings(sync_cs, &t); + return gpmc_cs_set_timings(sync_cs, &t, &tusb_sync); } /* tusb driver calls this when it changes the chip's clocking */ diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h index 0fdf7080e4a6..7e0829682bd0 100644 --- a/arch/arm/mach-omap2/vp.h +++ b/arch/arm/mach-omap2/vp.h @@ -21,15 +21,6 @@ struct voltagedomain; -/* - * Voltage Processor (VP) identifiers - */ -#define OMAP3_VP_VDD_MPU_ID 0 -#define OMAP3_VP_VDD_CORE_ID 1 -#define OMAP4_VP_VDD_CORE_ID 0 -#define OMAP4_VP_VDD_IVA_ID 1 -#define OMAP4_VP_VDD_MPU_ID 2 - /* XXX document */ #define VP_IDLE_TIMEOUT 200 #define VP_TRANXDONE_TIMEOUT 300 diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c index 1914e026245e..b0590fe6ab01 100644 --- a/arch/arm/mach-omap2/vp3xxx_data.c +++ b/arch/arm/mach-omap2/vp3xxx_data.c @@ -28,8 +28,8 @@ #include "prm2xxx_3xxx.h" static const struct omap_vp_ops omap3_vp_ops = { - .check_txdone = omap3_prm_vp_check_txdone, - .clear_txdone = omap3_prm_vp_clear_txdone, + .check_txdone = omap_prm_vp_check_txdone, + .clear_txdone = omap_prm_vp_clear_txdone, }; /* diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c index e62f6b018beb..2448bb9a8716 100644 --- a/arch/arm/mach-omap2/vp44xx_data.c +++ b/arch/arm/mach-omap2/vp44xx_data.c @@ -28,8 +28,8 @@ #include "vp.h" static const struct omap_vp_ops omap4_vp_ops = { - .check_txdone = omap4_prm_vp_check_txdone, - .clear_txdone = omap4_prm_vp_clear_txdone, + .check_txdone = omap_prm_vp_check_txdone, + .clear_txdone = omap_prm_vp_clear_txdone, }; /* |