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| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-07-02 10:54:01 +0200 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-07-02 10:54:01 +0200 |
| commit | 29cb3cd208dd0e4471bb80bec4facc49ceb199fa (patch) | |
| tree | 035128bf7af997d5e1e5208c900ba78c5a1df46d /arch/arm/mach-omap2 | |
| parent | ARM: pm: omap3: move saving of the auxiliary control registers to C (diff) | |
| download | linux-29cb3cd208dd0e4471bb80bec4facc49ceb199fa.tar.xz linux-29cb3cd208dd0e4471bb80bec4facc49ceb199fa.zip | |
ARM: pm: allow suspend finisher to return error codes
There are SoCs where attempting to enter a low power state is ignored,
and the CPU continues executing instructions with all state preserved.
It is over-complex at that point to disable the MMU just to call the
resume path.
Instead, allow the suspend finisher to return error codes to abort
suspend in this circumstance, where the cpu_suspend internals will then
unwind the saved state on the stack. Also omit the tlb flush as no
changes to the page tables will have happened.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-omap2')
| -rw-r--r-- | arch/arm/mach-omap2/pm34xx.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 7238a63e24e2..b77d82665abb 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -321,9 +321,10 @@ static void omap34xx_save_context(u32 *save) *save++ = val; } -static void omap34xx_do_sram_idle(unsigned long save_state) +static int omap34xx_do_sram_idle(unsigned long save_state) { omap34xx_cpu_suspend(save_state); + return 0; } void omap_sram_idle(void) |