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authorDave Gerlach <d-gerlach@ti.com>2019-04-02 18:57:43 +0200
committerTony Lindgren <tony@atomide.com>2019-04-09 17:32:12 +0200
commit11140cc40ddc3e7a2f2e3352e8a0587a93ba75df (patch)
tree61157e7e2702f39ae8fe6e2e29024b5d27d17336 /arch/arm/mach-omap2
parentmemory: ti-emif-sram: Add ti_emif_run_hw_leveling for DDR3 hardware leveling (diff)
downloadlinux-11140cc40ddc3e7a2f2e3352e8a0587a93ba75df.tar.xz
linux-11140cc40ddc3e7a2f2e3352e8a0587a93ba75df.zip
ARM: OMAP2+: sleep43xx: Run EMIF HW leveling on resume path
When returning from DeepSleep mode on AM437x platforms the EMIF must run DDR hardware leveling, same as done during u-boot, to properly restore the EMIF PHY to it's operational state on platforms using DDR3. Call the ti-emif-sram-pm run_hw_leveling routine to perform this. This happens after all other EMIF values are restored so the exact same configuration used at boot is used at the end of EMIF resume as well. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r--arch/arm/mach-omap2/sleep43xx.S3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/sleep43xx.S b/arch/arm/mach-omap2/sleep43xx.S
index 5b9343b58fc7..0c1031442571 100644
--- a/arch/arm/mach-omap2/sleep43xx.S
+++ b/arch/arm/mach-omap2/sleep43xx.S
@@ -368,6 +368,9 @@ wait_emif_enable1:
mov r1, #AM43XX_EMIF_POWEROFF_DISABLE
str r1, [r2, #0x0]
+ ldr r1, [r9, #EMIF_PM_RUN_HW_LEVELING]
+ blx r1
+
#ifdef CONFIG_CACHE_L2X0
ldr r2, l2_cache_base
ldr r0, [r2, #L2X0_CTRL]