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authorLennert Buytenhek <buytenh@wantstofly.org>2008-06-26 17:12:50 +0200
committerNicolas Pitre <nico@cam.org>2008-06-30 22:04:44 +0200
commitda01bba3cb8814b17d809e09c301e1dad86fec87 (patch)
tree0605379dac7ae8b9de458b2d46230c839b319c34 /arch/arm/mach-orion5x/common.h
parent[ARM] Kirkwood: support L2 writeback mode (diff)
downloadlinux-da01bba3cb8814b17d809e09c301e1dad86fec87.tar.xz
linux-da01bba3cb8814b17d809e09c301e1dad86fec87.zip
[ARM] Orion: make PCI handling code deal with Cardbus slots
The Cardbus connector does not have an IDSEL signal, and Cardbus cards are always the intended target of configuration transactions on their local PCI bus. This means that if the Orion's PCI bus signals are hooked up to a Cardbus slot, the same set of PCI functions will will appear 31 times, for each of the PCI device IDs 1-31 (ID 0 is the host bridge). This patch adds a function to the Orion PCI handling code that board support code can call to enable Cardbus mode. When Cardbus mode is enabled, configuration transactions on the PCI local bus are only allowed to PCI IDs 0 (host bridge) and 1 (cardbus device). Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Diffstat (limited to 'arch/arm/mach-orion5x/common.h')
-rw-r--r--arch/arm/mach-orion5x/common.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h
index 97db8d88f3db..f72cf0e77544 100644
--- a/arch/arm/mach-orion5x/common.h
+++ b/arch/arm/mach-orion5x/common.h
@@ -40,6 +40,7 @@ struct pci_bus;
struct pci_sys_data;
void orion5x_pcie_id(u32 *dev, u32 *rev);
+void orion5x_pci_set_cardbus_mode(void);
int orion5x_pci_sys_setup(int nr, struct pci_sys_data *sys);
struct pci_bus *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys);
int orion5x_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin);