summaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-pnx4008/irq.c
diff options
context:
space:
mode:
authorVitaly Wool <vwool@ru.mvista.com>2006-07-05 15:47:20 +0200
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-07-05 15:47:20 +0200
commit5904a7f9167cdeb95569799e0be652c2ce6d3298 (patch)
tree724016de1c8a478d391a7b23a2368d9c594be2ef /arch/arm/mach-pnx4008/irq.c
parent[ARM] 3710/1: AT91 Serial: Use GPIO API (diff)
downloadlinux-5904a7f9167cdeb95569799e0be652c2ce6d3298.tar.xz
linux-5904a7f9167cdeb95569799e0be652c2ce6d3298.zip
[ARM] 3709/1: pnx4008: convert to generic irq subsystem
Patch from Vitaly Wool Convert pnx4008 chip support to use generic irq subsystem Signed-off-by: Vitaly Wool <vitalywool@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-pnx4008/irq.c')
-rw-r--r--arch/arm/mach-pnx4008/irq.c22
1 files changed, 10 insertions, 12 deletions
diff --git a/arch/arm/mach-pnx4008/irq.c b/arch/arm/mach-pnx4008/irq.c
index 9b0a8e084e99..3a4bcf3d91fa 100644
--- a/arch/arm/mach-pnx4008/irq.c
+++ b/arch/arm/mach-pnx4008/irq.c
@@ -22,8 +22,8 @@
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/device.h>
+#include <linux/irq.h>
#include <asm/hardware.h>
-#include <asm/irq.h>
#include <asm/io.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
@@ -96,26 +96,24 @@ void __init pnx4008_init_irq(void)
{
unsigned int i;
- /* configure and enable IRQ 0,1,30,31 (cascade interrupts) mask all others */
+ /* configure IRQ's */
+ for (i = 0; i < NR_IRQS; i++) {
+ set_irq_flags(i, IRQF_VALID);
+ set_irq_chip(i, &pnx4008_irq_chip);
+ pnx4008_set_irq_type(i, pnx4008_irq_type[i]);
+ }
+
+ /* configure and enable IRQ 0,1,30,31 (cascade interrupts) */
pnx4008_set_irq_type(SUB1_IRQ_N, pnx4008_irq_type[SUB1_IRQ_N]);
pnx4008_set_irq_type(SUB2_IRQ_N, pnx4008_irq_type[SUB2_IRQ_N]);
pnx4008_set_irq_type(SUB1_FIQ_N, pnx4008_irq_type[SUB1_FIQ_N]);
pnx4008_set_irq_type(SUB2_FIQ_N, pnx4008_irq_type[SUB2_FIQ_N]);
+ /* mask all others */
__raw_writel((1 << SUB2_FIQ_N) | (1 << SUB1_FIQ_N) |
(1 << SUB2_IRQ_N) | (1 << SUB1_IRQ_N),
INTC_ER(MAIN_BASE_INT));
__raw_writel(0, INTC_ER(SIC1_BASE_INT));
__raw_writel(0, INTC_ER(SIC2_BASE_INT));
-
- /* configure all other IRQ's */
- for (i = 0; i < NR_IRQS; i++) {
- if (i == SUB2_FIQ_N || i == SUB1_FIQ_N ||
- i == SUB2_IRQ_N || i == SUB1_IRQ_N)
- continue;
- set_irq_flags(i, IRQF_VALID);
- set_irq_chip(i, &pnx4008_irq_chip);
- pnx4008_set_irq_type(i, pnx4008_irq_type[i]);
- }
}