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author | Roland Stigge <stigge@antcom.de> | 2012-08-26 16:30:37 +0200 |
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committer | Roland Stigge <stigge@antcom.de> | 2012-08-26 16:30:37 +0200 |
commit | d684f05f2d55655eee93d86974e9271010aaed09 (patch) | |
tree | 291edb04ccf39fb274ce08bca0dca3b5985315a5 /arch/arm/mach-pnx4008/serial.c | |
parent | Linux 3.6-rc3 (diff) | |
download | linux-d684f05f2d55655eee93d86974e9271010aaed09.tar.xz linux-d684f05f2d55655eee93d86974e9271010aaed09.zip |
ARM: mach-pnx4008: Remove architecture
This patch removes the ARM architecture mach-pnx4008. No direct support or user
feedback since 2006. Acknowledgements from NXP/Philips and Linux arm-soc
maintainers.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Diffstat (limited to 'arch/arm/mach-pnx4008/serial.c')
-rw-r--r-- | arch/arm/mach-pnx4008/serial.c | 67 |
1 files changed, 0 insertions, 67 deletions
diff --git a/arch/arm/mach-pnx4008/serial.c b/arch/arm/mach-pnx4008/serial.c deleted file mode 100644 index 374c138ac1ac..000000000000 --- a/arch/arm/mach-pnx4008/serial.c +++ /dev/null @@ -1,67 +0,0 @@ -/* - * linux/arch/arm/mach-pnx4008/serial.c - * - * PNX4008 UART initialization - * - * Copyright: MontaVista Software Inc. (c) 2005 - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/io.h> - -#include <mach/platform.h> -#include <mach/hardware.h> - -#include <linux/serial_core.h> -#include <linux/serial_reg.h> - -#include <mach/gpio-pnx4008.h> -#include <mach/clock.h> - -#define UART_3 0 -#define UART_4 1 -#define UART_5 2 -#define UART_6 3 -#define UART_UNKNOWN (-1) - -#define UART3_BASE_VA IO_ADDRESS(PNX4008_UART3_BASE) -#define UART4_BASE_VA IO_ADDRESS(PNX4008_UART4_BASE) -#define UART5_BASE_VA IO_ADDRESS(PNX4008_UART5_BASE) -#define UART6_BASE_VA IO_ADDRESS(PNX4008_UART6_BASE) - -#define UART_FCR_OFFSET 8 -#define UART_FIFO_SIZE 64 - -void pnx4008_uart_init(void) -{ - u32 tmp; - int i = UART_FIFO_SIZE; - - __raw_writel(0xC1, UART5_BASE_VA + UART_FCR_OFFSET); - __raw_writel(0xC1, UART3_BASE_VA + UART_FCR_OFFSET); - - /* Send a NULL to fix the UART HW bug */ - __raw_writel(0x00, UART5_BASE_VA); - __raw_writel(0x00, UART3_BASE_VA); - - while (i--) { - tmp = __raw_readl(UART5_BASE_VA); - tmp = __raw_readl(UART3_BASE_VA); - } - __raw_writel(0, UART5_BASE_VA + UART_FCR_OFFSET); - __raw_writel(0, UART3_BASE_VA + UART_FCR_OFFSET); - - /* setup wakeup interrupt */ - start_int_set_rising_edge(SE_U3_RX_INT); - start_int_ack(SE_U3_RX_INT); - start_int_umask(SE_U3_RX_INT); - - start_int_set_rising_edge(SE_U5_RX_INT); - start_int_ack(SE_U5_RX_INT); - start_int_umask(SE_U5_RX_INT); -} - |