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authorRongjun Ying <rongjun.ying@csr.com>2011-07-08 11:40:14 +0200
committerBarry Song <21cnbao@gmail.com>2011-07-09 01:21:53 +0200
commit89e162afd37caa6acab4e05b6e9e9fad6235381e (patch)
treeac5dafe6664ab1e5fab867fcef7d8a7c685d8f78 /arch/arm/mach-prima2/Makefile
parentARM: CSR: mapping early DEBUG_LL uart (diff)
downloadlinux-89e162afd37caa6acab4e05b6e9e9fad6235381e.tar.xz
linux-89e162afd37caa6acab4e05b6e9e9fad6235381e.zip
ARM: CSR: initializing L2 cache
Signed-off-by: Rongjun Ying <rongjun.ying@csr.com> Signed-off-by: Barry Song <baohua.song@csr.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-prima2/Makefile')
-rw-r--r--arch/arm/mach-prima2/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-prima2/Makefile b/arch/arm/mach-prima2/Makefile
index f2fba666c109..7af7fc05d565 100644
--- a/arch/arm/mach-prima2/Makefile
+++ b/arch/arm/mach-prima2/Makefile
@@ -4,3 +4,4 @@ obj-y += clock.o
obj-y += rstc.o
obj-y += prima2.o
obj-$(CONFIG_DEBUG_LL) += lluart.o
+obj-$(CONFIG_CACHE_L2X0) += l2x0.o