diff options
author | Barry Song <Baohua.Song@csr.com> | 2015-01-04 07:48:20 +0100 |
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committer | Barry Song <Baohua.Song@csr.com> | 2015-01-20 12:56:40 +0100 |
commit | e664c3fffdbcef3fd50858fd299eb2bde84dfaf8 (patch) | |
tree | bc48699577a3fd9de754a9aa30874c2753cbaf11 /arch/arm/mach-prima2 | |
parent | ARM: sirf: add two debug ports for CSRatlas7 SoC (diff) | |
download | linux-e664c3fffdbcef3fd50858fd299eb2bde84dfaf8.tar.xz linux-e664c3fffdbcef3fd50858fd299eb2bde84dfaf8.zip |
ARM: sirf: drop Marco support in reset controller module
Marco will not be supported any more. It has been replaced by CSR
Atlas7.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-prima2')
-rw-r--r-- | arch/arm/mach-prima2/rstc.c | 41 |
1 files changed, 12 insertions, 29 deletions
diff --git a/arch/arm/mach-prima2/rstc.c b/arch/arm/mach-prima2/rstc.c index e1f1f86f6a95..7c251eb11d01 100644 --- a/arch/arm/mach-prima2/rstc.c +++ b/arch/arm/mach-prima2/rstc.c @@ -34,36 +34,20 @@ static int sirfsoc_reset_module(struct reset_controller_dev *rcdev, mutex_lock(&rstc_lock); - if (of_device_is_compatible(rcdev->of_node, "sirf,prima2-rstc")) { - /* - * Writing 1 to this bit resets corresponding block. - * Writing 0 to this bit de-asserts reset signal of the - * corresponding block. datasheet doesn't require explicit - * delay between the set and clear of reset bit. it could - * be shorter if tests pass. - */ - writel(readl(sirfsoc_rstc_base + + /* + * Writing 1 to this bit resets corresponding block. + * Writing 0 to this bit de-asserts reset signal of the + * corresponding block. datasheet doesn't require explicit + * delay between the set and clear of reset bit. it could + * be shorter if tests pass. + */ + writel(readl(sirfsoc_rstc_base + (reset_bit / 32) * 4) | (1 << reset_bit), - sirfsoc_rstc_base + (reset_bit / 32) * 4); - msleep(20); - writel(readl(sirfsoc_rstc_base + + sirfsoc_rstc_base + (reset_bit / 32) * 4); + msleep(20); + writel(readl(sirfsoc_rstc_base + (reset_bit / 32) * 4) & ~(1 << reset_bit), - sirfsoc_rstc_base + (reset_bit / 32) * 4); - } else { - /* - * For MARCO and POLO - * Writing 1 to SET register resets corresponding block. - * Writing 1 to CLEAR register de-asserts reset signal of the - * corresponding block. - * datasheet doesn't require explicit delay between the set and - * clear of reset bit. it could be shorter if tests pass. - */ - writel(1 << reset_bit, - sirfsoc_rstc_base + (reset_bit / 32) * 8); - msleep(20); - writel(1 << reset_bit, - sirfsoc_rstc_base + (reset_bit / 32) * 8 + 4); - } + sirfsoc_rstc_base + (reset_bit / 32) * 4); mutex_unlock(&rstc_lock); @@ -106,7 +90,6 @@ static int sirfsoc_rstc_probe(struct platform_device *pdev) static const struct of_device_id rstc_ids[] = { { .compatible = "sirf,prima2-rstc" }, - { .compatible = "sirf,marco-rstc" }, {}, }; |