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authorLinus Torvalds <torvalds@g5.osdl.org>2006-10-06 19:53:39 +0200
committerLinus Torvalds <torvalds@g5.osdl.org>2006-10-06 19:59:54 +0200
commit0cd61b68c340a4f901a06e8bb5e0dea4353161c0 (patch)
treecfd72be941ecd172627a06dd61d98b55cec63a39 /arch/arm/mach-pxa/mainstone.c
parentMerge branch 'for-linus' of git://git390.osdl.marist.edu/pub/scm/linux-2.6 (diff)
downloadlinux-0cd61b68c340a4f901a06e8bb5e0dea4353161c0.tar.xz
linux-0cd61b68c340a4f901a06e8bb5e0dea4353161c0.zip
Initial blind fixup for arm for irq changes
Untested, but this should fix up the bulk of the totally mechanical issues, and should make the actual detail fixing easier. Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/arm/mach-pxa/mainstone.c')
-rw-r--r--arch/arm/mach-pxa/mainstone.c7
1 files changed, 3 insertions, 4 deletions
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index 7ba0447d6fa3..8c3019784915 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -71,8 +71,7 @@ static struct irq_chip mainstone_irq_chip = {
.unmask = mainstone_unmask_irq,
};
-static void mainstone_irq_handler(unsigned int irq, struct irqdesc *desc,
- struct pt_regs *regs)
+static void mainstone_irq_handler(unsigned int irq, struct irqdesc *desc)
{
unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
do {
@@ -80,7 +79,7 @@ static void mainstone_irq_handler(unsigned int irq, struct irqdesc *desc,
if (likely(pending)) {
irq = MAINSTONE_IRQ(0) + __ffs(pending);
desc = irq_desc + irq;
- desc_handle_irq(irq, desc, regs);
+ desc_handle_irq(irq, desc);
}
pending = MST_INTSETCLR & mainstone_irq_enabled;
} while (pending);
@@ -314,7 +313,7 @@ static struct pxafb_mach_info mainstone_pxafb_info = {
.pxafb_backlight_power = mainstone_backlight_power,
};
-static int mainstone_mci_init(struct device *dev, irqreturn_t (*mstone_detect_int)(int, void *, struct pt_regs *), void *data)
+static int mainstone_mci_init(struct device *dev, irqreturn_t (*mstone_detect_int)(int, void *), void *data)
{
int err;