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authorLinus Torvalds <torvalds@linux-foundation.org>2017-09-12 15:10:44 +0200
committerLinus Torvalds <torvalds@linux-foundation.org>2017-09-12 15:10:44 +0200
commit8fac2f96ab86b0e14ec4e42851e21e9b518bdc55 (patch)
treef7d45eb60cf6075f90263d9d2eaa796ce6c616b6 /arch/arm/mach-pxa
parentMerge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/s39... (diff)
parentMerge branches 'fixes' and 'misc' into for-linus (diff)
downloadlinux-8fac2f96ab86b0e14ec4e42851e21e9b518bdc55.tar.xz
linux-8fac2f96ab86b0e14ec4e42851e21e9b518bdc55.zip
Merge branch 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm
Pull ARM updates from Russell King: "Low priority fixes and updates for ARM: - add some missing includes - efficiency improvements in system call entry code when tracing is enabled - ensure ARMv6+ is always built as EABI - export save_stack_trace_tsk() - fix fatal signal handling during mm fault - build translation table base address register from scratch - appropriately align the .data section to a word boundary where we rely on that data being word aligned" * 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: ARM: 8691/1: Export save_stack_trace_tsk() ARM: 8692/1: mm: abort uaccess retries upon fatal signal ARM: 8690/1: lpae: build TTB control register value from scratch in v7_ttb_setup ARM: align .data section ARM: always enable AEABI for ARMv6+ ARM: avoid saving and restoring registers unnecessarily ARM: move PC value into r9 ARM: obtain thread info structure later ARM: use aliases for registers in entry-common ARM: 8689/1: scu: add missing errno include ARM: 8688/1: pm: add missing types include
Diffstat (limited to 'arch/arm/mach-pxa')
-rw-r--r--arch/arm/mach-pxa/mioa701_bootresume.S2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-pxa/mioa701_bootresume.S b/arch/arm/mach-pxa/mioa701_bootresume.S
index 81591491ab94..42d93f40a59f 100644
--- a/arch/arm/mach-pxa/mioa701_bootresume.S
+++ b/arch/arm/mach-pxa/mioa701_bootresume.S
@@ -16,6 +16,7 @@
* insist on it to be truly read-only.
*/
.data
+ .align 2
ENTRY(mioa701_bootstrap)
0:
b 1f
@@ -34,4 +35,5 @@ ENTRY(mioa701_jumpaddr)
ENTRY(mioa701_bootstrap_lg)
.data
+ .align 2
.word 2b-0b