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authorRussell King <rmk+kernel@armlinux.org.uk>2016-08-19 17:24:36 +0200
committerRussell King <rmk+kernel@armlinux.org.uk>2016-08-26 16:10:19 +0200
commitc94e4ad2d5e0e5f4036cccaa0e6e773841e8f859 (patch)
tree5cf6c39838ac6a2b6fba862978942b1bcdecb8a9 /arch/arm/mach-rpc
parentARM: sa1100: move StrongARM CPU ID checks to cputype.h (diff)
downloadlinux-c94e4ad2d5e0e5f4036cccaa0e6e773841e8f859.tar.xz
linux-c94e4ad2d5e0e5f4036cccaa0e6e773841e8f859.zip
ARM: document and update UNCACHEABLE_ADDR definitions
Document the UNCACHEABLE_ADDR definitions for footbridge and SA1100 so that we know where they're located and/or what they're accessing. Change RiscPC to calculate the UNCACHEABLE_ADDR value from FLUSH_BASE as that's where we locate that. UNCACHEABLE_ADDR is used to perform an uncached access (ARMv4 terminology) necessary to force a CPU clock-switch to the memory- speed clock, as required for entering WFI. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Diffstat (limited to 'arch/arm/mach-rpc')
-rw-r--r--arch/arm/mach-rpc/include/mach/hardware.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-rpc/include/mach/hardware.h b/arch/arm/mach-rpc/include/mach/hardware.h
index 257166b21f3d..aa79fa47373a 100644
--- a/arch/arm/mach-rpc/include/mach/hardware.h
+++ b/arch/arm/mach-rpc/include/mach/hardware.h
@@ -40,7 +40,7 @@
#define SCREEN_END 0xdfc00000
#define SCREEN_BASE 0xdf800000
-#define UNCACHEABLE_ADDR 0xdf010000
+#define UNCACHEABLE_ADDR (FLUSH_BASE + 0x10000)
/*
* IO Addresses