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authorJames Morris <jmorris@namei.org>2008-08-28 02:47:34 +0200
committerJames Morris <jmorris@namei.org>2008-08-28 02:47:34 +0200
commit86d688984deefa3ae5a802880c11f2b408b5d6cf (patch)
tree7ea5e8189b0a774626d3ed7c3c87df2495a4c4a0 /arch/arm/mach-s3c2410/include/mach/regs-s3c2412-mem.h
parentselinux: add support for installing a dummy policy (v2) (diff)
parentIB/mlx4: Actually return L_Key and R_Key for fast register MRs (diff)
downloadlinux-86d688984deefa3ae5a802880c11f2b408b5d6cf.tar.xz
linux-86d688984deefa3ae5a802880c11f2b408b5d6cf.zip
Merge branch 'master' into next
Diffstat (limited to 'arch/arm/mach-s3c2410/include/mach/regs-s3c2412-mem.h')
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diff --git a/arch/arm/mach-s3c2410/include/mach/regs-s3c2412-mem.h b/arch/arm/mach-s3c2410/include/mach/regs-s3c2412-mem.h
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@@ -0,0 +1,29 @@
+/* arch/arm/mach-s3c2410/include/mach/regs-s3c2412-mem.h
+ *
+ * Copyright (c) 2008 Simtec Electronics
+ * Ben Dooks <ben@simtec.co.uk>
+ * http://armlinux.simtec.co.uk/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C2412 memory register definitions
+*/
+
+#ifndef __ASM_ARM_REGS_S3C2412_MEM
+#define __ASM_ARM_REGS_S3C2412_MEM
+
+#ifndef S3C2412_MEMREG
+#define S3C2412_MEMREG(x) (S3C24XX_VA_MEMCTRL + (x))
+#endif
+
+#define S3C2412_BANKCFG S3C2412_MEMREG(0x00)
+#define S3C2412_BANKCON1 S3C2412_MEMREG(0x04)
+#define S3C2412_BANKCON2 S3C2412_MEMREG(0x08)
+#define S3C2412_BANKCON3 S3C2412_MEMREG(0x0C)
+
+#define S3C2412_REFRESH S3C2412_MEMREG(0x10)
+#define S3C2412_TIMEOUT S3C2412_MEMREG(0x14)
+
+#endif /* __ASM_ARM_REGS_S3C2412_MEM */