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author | Ben Dooks <ben-linux@fluff.org> | 2008-01-28 13:01:30 +0100 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-01-28 14:20:52 +0100 |
commit | cca851d7b4d87f3a644d3381930dc737890bd9ac (patch) | |
tree | 0db760e113bac0bd0b97940731e999a84f6323a1 /arch/arm/mach-s3c2412/s3c2412.c | |
parent | [ARM] 4789/1: S3C2412: Add missing CLKDIVN register values (diff) | |
download | linux-cca851d7b4d87f3a644d3381930dc737890bd9ac.tar.xz linux-cca851d7b4d87f3a644d3381930dc737890bd9ac.zip |
[ARM] 4790/1: S3C2412: Fix parent selection for msysclk.
The msysclk clock was checking for the wrong PLL for the
parent in s3c2412_setparent_msysclk(), trying the UPLL instead
of the MPLL output.
Also ensure the mpll and fclks are at the same rate at init time.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-s3c2412/s3c2412.c')
-rw-r--r-- | arch/arm/mach-s3c2412/s3c2412.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c index 265cd3f567a3..abf1599c9f97 100644 --- a/arch/arm/mach-s3c2412/s3c2412.c +++ b/arch/arm/mach-s3c2412/s3c2412.c @@ -168,6 +168,8 @@ void __init s3c2412_init_clocks(int xtal) fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal*2); + clk_mpll.rate = fclk; + tmp = __raw_readl(S3C2410_CLKDIVN); /* work out clock scalings */ |