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| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-07-02 10:54:01 +0200 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-07-02 10:54:01 +0200 |
| commit | 29cb3cd208dd0e4471bb80bec4facc49ceb199fa (patch) | |
| tree | 035128bf7af997d5e1e5208c900ba78c5a1df46d /arch/arm/mach-s3c2416 | |
| parent | ARM: pm: omap3: move saving of the auxiliary control registers to C (diff) | |
| download | linux-29cb3cd208dd0e4471bb80bec4facc49ceb199fa.tar.xz linux-29cb3cd208dd0e4471bb80bec4facc49ceb199fa.zip | |
ARM: pm: allow suspend finisher to return error codes
There are SoCs where attempting to enter a low power state is ignored,
and the CPU continues executing instructions with all state preserved.
It is over-complex at that point to disable the MMU just to call the
resume path.
Instead, allow the suspend finisher to return error codes to abort
suspend in this circumstance, where the cpu_suspend internals will then
unwind the saved state on the stack. Also omit the tlb flush as no
changes to the page tables will have happened.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-s3c2416')
| -rw-r--r-- | arch/arm/mach-s3c2416/pm.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/mach-s3c2416/pm.c b/arch/arm/mach-s3c2416/pm.c index 9e67a2a07a86..9ec54f1d8e75 100644 --- a/arch/arm/mach-s3c2416/pm.c +++ b/arch/arm/mach-s3c2416/pm.c @@ -24,7 +24,7 @@ extern void s3c2412_sleep_enter(void); -static void s3c2416_cpu_suspend(unsigned long arg) +static int s3c2416_cpu_suspend(unsigned long arg) { /* enable wakeup sources regardless of battery state */ __raw_writel(S3C2443_PWRCFG_SLEEP, S3C2443_PWRCFG); @@ -33,6 +33,8 @@ static void s3c2416_cpu_suspend(unsigned long arg) __raw_writel(0x2BED, S3C2443_PWRMODE); s3c2412_sleep_enter(); + + panic("sleep resumed to originator?"); } static void s3c2416_pm_prepare(void) |