diff options
| author | Sylwester Nawrocki <sylvester.nawrocki@gmail.com> | 2013-07-24 06:23:51 +0200 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2013-07-24 06:23:51 +0200 |
| commit | d817468c4b2892b9468e2a0c92116e38a3a61370 (patch) | |
| tree | d5a9ef4ff8b7e8f2e4febfcbb5dd17874e681aaf /arch/arm/mach-s3c24xx/clock-s3c2440.c | |
| parent | ARM: EXYNOS: Enable 64-bit DMA for EXYNOS5440 if LPAE is enabled (diff) | |
| download | linux-d817468c4b2892b9468e2a0c92116e38a3a61370.tar.xz linux-d817468c4b2892b9468e2a0c92116e38a3a61370.zip | |
ARM: S3C24XX: Add missing clkdev entries for s3c2440 UART
This patch restores serial port operation which has been broken since
commit 60e93575476f ("serial: samsung: enable clock before clearing
pending interrupts during init")
That commit only uncovered the real issue which was missing clkdev
entries for the "uart" clocks on S3C2440. It went unnoticed so far
because return value of clk API calls were not being checked at all
in the samsung serial port driver.
This patch should be backported to at least 3.10 stable kernel, since
the serial port has not been working on s3c2440 since 3.10-rc5.
Cc: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
[on S3C2440 SoC based Mini2440 board]
Tested-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Tested-by: Juergen Beisert <jbe@pengutronix.de>
Cc: <stable@vger.kernel.org> [3.10]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s3c24xx/clock-s3c2440.c')
| -rw-r--r-- | arch/arm/mach-s3c24xx/clock-s3c2440.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2440.c b/arch/arm/mach-s3c24xx/clock-s3c2440.c index 1069b5680826..aaf006d1d6dc 100644 --- a/arch/arm/mach-s3c24xx/clock-s3c2440.c +++ b/arch/arm/mach-s3c24xx/clock-s3c2440.c @@ -166,6 +166,9 @@ static struct clk_lookup s3c2440_clk_lookup[] = { CLKDEV_INIT(NULL, "clk_uart_baud1", &s3c24xx_uclk), CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p), CLKDEV_INIT(NULL, "clk_uart_baud3", &s3c2440_clk_fclk_n), + CLKDEV_INIT("s3c2440-uart.0", "uart", &s3c24xx_clk_uart0), + CLKDEV_INIT("s3c2440-uart.1", "uart", &s3c24xx_clk_uart1), + CLKDEV_INIT("s3c2440-uart.2", "uart", &s3c24xx_clk_uart2), CLKDEV_INIT("s3c2440-camif", "camera", &s3c2440_clk_cam_upll), }; |