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authorHeiko Stuebner <heiko@sntech.de>2014-05-15 23:59:18 +0200
committerKukjin Kim <kgene.kim@samsung.com>2014-05-25 21:05:00 +0200
commitdaf67dfc5989495c887cfdbe76be72b7db724e60 (patch)
treec78979790b42a27cfbd5dd0f965383d47a9431ed /arch/arm/mach-s3c24xx/include
parentARM: compressed/head.S: remove s3c24xx special case (diff)
downloadlinux-daf67dfc5989495c887cfdbe76be72b7db724e60.tar.xz
linux-daf67dfc5989495c887cfdbe76be72b7db724e60.zip
ARM: S3C24XX: trim down debug uart handling
Using the lowlevel debug uart is a corner case - even more so in a multiplatform environment. So it seems reasonable to simply let the developer set the appropriate uart type for the debugged SoC. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s3c24xx/include')
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/debug-macro.S52
1 files changed, 1 insertions, 51 deletions
diff --git a/arch/arm/mach-s3c24xx/include/mach/debug-macro.S b/arch/arm/mach-s3c24xx/include/mach/debug-macro.S
index 2f39737544c0..fbe3e711ebab 100644
--- a/arch/arm/mach-s3c24xx/include/mach/debug-macro.S
+++ b/arch/arm/mach-s3c24xx/include/mach/debug-macro.S
@@ -13,11 +13,9 @@
*/
#include <mach/map.h>
-#include <mach/regs-gpio.h>
#include <linux/serial_s3c.h>
#define S3C2410_UART1_OFF (0x4000)
-#define SHIFT_2440TXF (14-9)
.macro addruart, rp, rv, tmp
ldr \rp, = S3C24XX_PA_UART
@@ -28,56 +26,11 @@
#endif
.endm
- .macro fifo_full_s3c24xx rd, rx
- @ check for arm920 vs arm926. currently assume all arm926
- @ devices have an 64 byte FIFO identical to the s3c2440
- mrc p15, 0, \rd, c0, c0
- and \rd, \rd, #0xff0
- teq \rd, #0x260
- beq 1004f
- mrc p15, 0, \rd, c1, c0
- tst \rd, #1
- addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
- addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
- bic \rd, \rd, #0xff000
- ldr \rd, [\rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0)]
- and \rd, \rd, #0x00ff0000
- teq \rd, #0x00440000 @ is it 2440?
-1004:
- ldr \rd, [\rx, # S3C2410_UFSTAT]
- moveq \rd, \rd, lsr #SHIFT_2440TXF
- tst \rd, #S3C2410_UFSTAT_TXFULL
- .endm
-
.macro fifo_full_s3c2410 rd, rx
ldr \rd, [\rx, # S3C2410_UFSTAT]
tst \rd, #S3C2410_UFSTAT_TXFULL
.endm
-/* fifo level reading */
-
- .macro fifo_level_s3c24xx rd, rx
- @ check for arm920 vs arm926. currently assume all arm926
- @ devices have an 64 byte FIFO identical to the s3c2440
- mrc p15, 0, \rd, c0, c0
- and \rd, \rd, #0xff0
- teq \rd, #0x260
- beq 10000f
- mrc p15, 0, \rd, c1, c0
- tst \rd, #1
- addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
- addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
- bic \rd, \rd, #0xff000
- ldr \rd, [\rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0)]
- and \rd, \rd, #0x00ff0000
- teq \rd, #0x00440000 @ is it 2440?
-
-10000:
- ldr \rd, [\rx, # S3C2410_UFSTAT]
- andne \rd, \rd, #S3C2410_UFSTAT_TXMASK
- andeq \rd, \rd, #S3C2440_UFSTAT_TXMASK
- .endm
-
.macro fifo_level_s3c2410 rd, rx
ldr \rd, [\rx, # S3C2410_UFSTAT]
and \rd, \rd, #S3C2410_UFSTAT_TXMASK
@@ -88,12 +41,9 @@
* used variants of these
*/
-#if defined(CONFIG_CPU_LLSERIAL_S3C2410_ONLY)
+#if defined(CONFIG_DEBUG_S3C2410_UART)
#define fifo_full fifo_full_s3c2410
#define fifo_level fifo_level_s3c2410
-#elif !defined(CONFIG_CPU_LLSERIAL_S3C2440_ONLY)
-#define fifo_full fifo_full_s3c24xx
-#define fifo_level fifo_level_s3c24xx
#endif
/* include the reset of the code which will do the work */