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| author | Kukjin Kim <kgene.kim@samsung.com> | 2013-01-02 19:27:36 +0100 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2013-01-10 19:45:36 +0100 |
| commit | 507c4d6839e2baf16e3ed7c8ede26163ed99e0e2 (patch) | |
| tree | 1d4db9e6f50d751f47ce9701ee4aa15eb716ade8 /arch/arm/mach-s3c24xx/osiris.h | |
| parent | ARM: S3C24XX: make h1940.h and h1940-latch.h local (diff) | |
| download | linux-507c4d6839e2baf16e3ed7c8ede26163ed99e0e2.tar.xz linux-507c4d6839e2baf16e3ed7c8ede26163ed99e0e2.zip | |
ARM: S3C24XX: make osiris-cpld.h and osiris-map.h local
This makes the headers local in mach-s3c24xx/.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s3c24xx/osiris.h')
| -rw-r--r-- | arch/arm/mach-s3c24xx/osiris.h | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c24xx/osiris.h b/arch/arm/mach-s3c24xx/osiris.h new file mode 100644 index 000000000000..b8d56074abac --- /dev/null +++ b/arch/arm/mach-s3c24xx/osiris.h @@ -0,0 +1,53 @@ +/* + * Copyright 2005 Simtec Electronics + * http://www.simtec.co.uk/products/ + * Ben Dooks <ben@simtec.co.uk> + * + * OSIRIS - CPLD control constants + * OSIRIS - Memory map definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __MACH_S3C24XX_OSIRIS_H +#define __MACH_S3C24XX_OSIRIS_H __FILE__ + +/* CTRL0 - NAND WP control */ + +#define OSIRIS_CTRL0_NANDSEL (0x3) +#define OSIRIS_CTRL0_BOOT_INT (1<<3) +#define OSIRIS_CTRL0_PCMCIA (1<<4) +#define OSIRIS_CTRL0_FIX8 (1<<5) +#define OSIRIS_CTRL0_PCMCIA_nWAIT (1<<6) +#define OSIRIS_CTRL0_PCMCIA_nIOIS16 (1<<7) + +#define OSIRIS_CTRL1_FIX8 (1<<0) + +#define OSIRIS_ID_REVMASK (0x7) + +/* start peripherals off after the S3C2410 */ + +#define OSIRIS_IOADDR(x) (S3C2410_ADDR((x) + 0x04000000)) + +#define OSIRIS_PA_CPLD (S3C2410_CS1 | (1<<26)) + +/* we put the CPLD registers next, to get them out of the way */ + +#define OSIRIS_VA_CTRL0 OSIRIS_IOADDR(0x00000000) +#define OSIRIS_PA_CTRL0 (OSIRIS_PA_CPLD) + +#define OSIRIS_VA_CTRL1 OSIRIS_IOADDR(0x00100000) +#define OSIRIS_PA_CTRL1 (OSIRIS_PA_CPLD + (1<<23)) + +#define OSIRIS_VA_CTRL2 OSIRIS_IOADDR(0x00200000) +#define OSIRIS_PA_CTRL2 (OSIRIS_PA_CPLD + (2<<23)) + +#define OSIRIS_VA_CTRL3 OSIRIS_IOADDR(0x00300000) +#define OSIRIS_PA_CTRL3 (OSIRIS_PA_CPLD + (2<<23)) + +#define OSIRIS_VA_IDREG OSIRIS_IOADDR(0x00700000) +#define OSIRIS_PA_IDREG (OSIRIS_PA_CPLD + (7<<23)) + +#endif /* __MACH_S3C24XX_OSIRIS_H */ |