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authorPaul Walmsley <paul@pwsan.com>2009-06-20 03:08:24 +0200
committerpaul <paul@twilight.(none)>2009-06-20 03:09:30 +0200
commit6adb8f388ef2f23d4a81e1e42d15f22d62749a06 (patch)
tree217206b7b4751b6644e3cbe91cfff8e4df861e48 /arch/arm/mach-s3c6400
parentMerge branch 'omap4' into for-next (diff)
downloadlinux-6adb8f388ef2f23d4a81e1e42d15f22d62749a06.tar.xz
linux-6adb8f388ef2f23d4a81e1e42d15f22d62749a06.zip
OMAP3 clock: remove wait for DPLL3 M2 clock to stabilize
The original CDP kernel that this code comes from waited for 0x800 loops after switching the CORE DPLL M2 divider. This does not appear to be necessary. Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-s3c6400')
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