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author | Ben Dooks <ben-linux@fluff.org> | 2009-05-18 17:32:29 +0200 |
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committer | Ben Dooks <ben-linux@fluff.org> | 2009-05-18 17:32:29 +0200 |
commit | bcb8a0d6f5e73c61a5290b4faaaa48dfa629e6b0 (patch) | |
tree | 6a4345fe0f908d60f52085b97818be705c62af8e /arch/arm/mach-s3c6400 | |
parent | [ARM] S3C64XX: Use common watchdog reset for system reset. (diff) | |
parent | [ARM] S3C64XX: Lower severity of DMA logging (diff) | |
download | linux-bcb8a0d6f5e73c61a5290b4faaaa48dfa629e6b0.tar.xz linux-bcb8a0d6f5e73c61a5290b4faaaa48dfa629e6b0.zip |
[ARM] S3C: Merge next-s3c64xx-dma2 into for-rmk-devel
Merge branch 'next-s3c64xx-dma2' into for-rmk-devel
Conflicts:
arch/arm/plat-s3c64xx/Makefile
Diffstat (limited to 'arch/arm/mach-s3c6400')
-rw-r--r-- | arch/arm/mach-s3c6400/include/mach/dma.h | 59 |
1 files changed, 58 insertions, 1 deletions
diff --git a/arch/arm/mach-s3c6400/include/mach/dma.h b/arch/arm/mach-s3c6400/include/mach/dma.h index 9771ac2cb07e..1067619f0ba0 100644 --- a/arch/arm/mach-s3c6400/include/mach/dma.h +++ b/arch/arm/mach-s3c6400/include/mach/dma.h @@ -11,6 +11,63 @@ #ifndef __ASM_ARCH_DMA_H #define __ASM_ARCH_DMA_H __FILE__ -/* currently nothing here, placeholder */ +#define S3C_DMA_CHANNELS (16) + +/* see mach-s3c2410/dma.h for notes on dma channel numbers */ + +/* Note, for the S3C64XX architecture we keep the DMACH_ + * defines in the order they are allocated to [S]DMA0/[S]DMA1 + * so that is easy to do DHACH_ -> DMA controller conversion + */ +enum dma_ch { + /* DMA0/SDMA0 */ + DMACH_UART0 = 0, + DMACH_UART0_SRC2, + DMACH_UART1, + DMACH_UART1_SRC2, + DMACH_UART2, + DMACH_UART2_SRC2, + DMACH_UART3, + DMACH_UART3_SRC2, + DMACH_PCM0_TX, + DMACH_PCM0_RX, + DMACH_I2S0_OUT, + DMACH_I2S0_IN, + DMACH_SPI0_TX, + DMACH_SPI0_RX, + DMACH_HSI_I2SV40_TX, + DMACH_HSI_I2SV40_RX, + + /* DMA1/SDMA1 */ + DMACH_PCM1_TX = 16, + DMACH_PCM1_RX, + DMACH_I2S1_OUT, + DMACH_I2S1_IN, + DMACH_SPI1_TX, + DMACH_SPI1_RX, + DMACH_AC97_PCMOUT, + DMACH_AC97_PCMIN, + DMACH_AC97_MICIN, + DMACH_PWM, + DMACH_IRDA, + DMACH_EXTERNAL, + DMACH_RES1, + DMACH_RES2, + DMACH_SECURITY_RX, /* SDMA1 only */ + DMACH_SECURITY_TX, /* SDMA1 only */ + DMACH_MAX /* the end */ +}; + +static __inline__ int s3c_dma_has_circular(void) +{ + /* we will be supporting ciruclar buffers as soon as we have DMA + * engine support. + */ + return 1; +} + +#define S3C2410_DMAF_CIRCULAR (1 << 0) + +#include <plat/dma.h> #endif /* __ASM_ARCH_IRQ_H */ |