diff options
| author | Padmavathi Venna <padma.v@samsung.com> | 2011-12-23 02:14:36 +0100 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2011-12-23 02:50:00 +0100 |
| commit | 4566c7f7612fc2323cfae1556c012bb096380a90 (patch) | |
| tree | 8b69f1970a199939ba85c6f9ed49a1514908d48b /arch/arm/mach-s3c64xx/setup-spi.c | |
| parent | ARM: SAMSUNG: Consolidation of SPI platform devices to plat-samsung (diff) | |
| download | linux-4566c7f7612fc2323cfae1556c012bb096380a90.tar.xz linux-4566c7f7612fc2323cfae1556c012bb096380a90.zip | |
ARM: S3C64XX: Modified files for SPI consolidation work
As SPI platform devices are consolidated to plat-samsung, some
corresponding changes are required in the respective machine folder.
Setup files are added for SPI GPIO configurations and platform data
initialization.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s3c64xx/setup-spi.c')
| -rw-r--r-- | arch/arm/mach-s3c64xx/setup-spi.c | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c64xx/setup-spi.c b/arch/arm/mach-s3c64xx/setup-spi.c new file mode 100644 index 000000000000..d9592ad7a825 --- /dev/null +++ b/arch/arm/mach-s3c64xx/setup-spi.c @@ -0,0 +1,45 @@ +/* linux/arch/arm/mach-s3c64xx/setup-spi.c + * + * Copyright (C) 2011 Samsung Electronics Ltd. + * http://www.samsung.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/gpio.h> +#include <linux/platform_device.h> + +#include <plat/gpio-cfg.h> +#include <plat/s3c64xx-spi.h> + +#ifdef CONFIG_S3C64XX_DEV_SPI0 +struct s3c64xx_spi_info s3c64xx_spi0_pdata __initdata = { + .fifo_lvl_mask = 0x7f, + .rx_lvl_offset = 13, + .tx_st_done = 21, +}; + +int s3c64xx_spi0_cfg_gpio(struct platform_device *dev) +{ + s3c_gpio_cfgall_range(S3C64XX_GPC(0), 3, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); + return 0; +} +#endif + +#ifdef CONFIG_S3C64XX_DEV_SPI1 +struct s3c64xx_spi_info s3c64xx_spi1_pdata __initdata = { + .fifo_lvl_mask = 0x7f, + .rx_lvl_offset = 13, + .tx_st_done = 21, +}; + +int s3c64xx_spi1_cfg_gpio(struct platform_device *dev) +{ + s3c_gpio_cfgall_range(S3C64XX_GPC(4), 3, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); + return 0; +} +#endif |