diff options
author | Ben Dooks <ben-linux@fluff.org> | 2010-10-01 07:20:55 +0200 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2010-10-23 04:49:37 +0200 |
commit | ce8f9abd62e3c9fb21d6cea96a07f42ed5e008ce (patch) | |
tree | 3378354ed54c0d7a4b9d6e0bd74534c7989fcc7c /arch/arm/mach-s5pc100/setup-sdhci-gpio.c | |
parent | ARM: S5P64X0: 2nd Change to using s3c_gpio_cfgpin_range() (diff) | |
download | linux-ce8f9abd62e3c9fb21d6cea96a07f42ed5e008ce.tar.xz linux-ce8f9abd62e3c9fb21d6cea96a07f42ed5e008ce.zip |
ARM: S5PC100: Change to using s3c_gpio_cfgpin_range()
Change the code setting ranges of GPIO pins using s3c_gpio_cfgpin() to
use the recently introduced s3c_gpio_cfgpin_range().
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
[kgene.kim@samsung.com: Fixed wrong change]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s5pc100/setup-sdhci-gpio.c')
-rw-r--r-- | arch/arm/mach-s5pc100/setup-sdhci-gpio.c | 15 |
1 files changed, 6 insertions, 9 deletions
diff --git a/arch/arm/mach-s5pc100/setup-sdhci-gpio.c b/arch/arm/mach-s5pc100/setup-sdhci-gpio.c index dc7208c639ea..79b031f5f434 100644 --- a/arch/arm/mach-s5pc100/setup-sdhci-gpio.c +++ b/arch/arm/mach-s5pc100/setup-sdhci-gpio.c @@ -37,10 +37,9 @@ void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) end = S5PC100_GPG0(2 + num); /* Set all the necessary GPG0/GPG1 pins to special-function 0 */ - for (gpio = S5PC100_GPG0(0); gpio < end; gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin_range(S5PC100_GPG0(0), 2 + num, S3C_GPIO_SFN(2)); + for (gpio = S5PC100_GPG0(0); gpio < end; gpio++) s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } if (width == 8) { for (gpio = S5PC100_GPG1(0); gpio <= S5PC100_GPG1(1); gpio++) { @@ -64,10 +63,9 @@ void s5pc100_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) end = S5PC100_GPG2(2 + width); /* Set all the necessary GPG2 pins to special-function 2 */ - for (gpio = S5PC100_GPG2(0); gpio < end; gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin_range(S5PC100_GPG2(0), 2 + width, S3C_GPIO_SFN(2)); + for (gpio = S5PC100_GPG2(0); gpio < end; gpio++) s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { s3c_gpio_setpull(S5PC100_GPG2(6), S3C_GPIO_PULL_UP); @@ -84,10 +82,9 @@ void s5pc100_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) end = S5PC100_GPG3(2 + width); /* Set all the necessary GPG3 pins to special-function 2 */ - for (gpio = S5PC100_GPG3(0); gpio < end; gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin_range(S5PC100_GPG3(0), 2 + width, S3C_GPIO_SFN(2)); + for (gpio = S5PC100_GPG3(0); gpio < end; gpio++) s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { s3c_gpio_setpull(S5PC100_GPG3(6), S3C_GPIO_PULL_UP); |