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author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-08-22 20:03:27 +0200 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-08-22 20:03:27 +0200 |
commit | 4238a417a91643e1162a98770288f630e37f0484 (patch) | |
tree | 9a4ec0f4249ebe5c723d3f281f087aa472666c02 /arch/arm/mach-s5pv210/mach-aquila.c | |
parent | Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/pen... (diff) | |
parent | drm/i915,intel_agp: Add support for Sandybridge D0 (diff) | |
download | linux-4238a417a91643e1162a98770288f630e37f0484.tar.xz linux-4238a417a91643e1162a98770288f630e37f0484.zip |
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel: (58 commits)
drm/i915,intel_agp: Add support for Sandybridge D0
drm/i915: fix render pipe control notify on sandybridge
agp/intel: set 40-bit dma mask on Sandybridge
drm/i915: Remove the conflicting BUG_ON()
drm/i915/suspend: s/IS_IRONLAKE/HAS_PCH_SPLIT/
drm/i915/suspend: Flush register writes before busy-waiting.
i915: disable DAC on Ironlake also when doing CRT load detection.
drm/i915: wait for actual vblank, not just 20ms
drm/i915: make sure eDP PLL is enabled at the right time
drm/i915: fix VGA plane disable for Ironlake+
drm/i915: eDP mode set sequence corrections
drm/i915: add panel reset workaround
drm/i915: Enable RC6 on Ironlake.
drm/i915/sdvo: Only set is_lvds if we have a valid fixed mode.
drm/i915: Set up a render context on Ironlake
drm/i915 invalidate indirect state pointers at end of ring exec
drm/i915: Wake-up wait_request() from elapsed hang-check (v2)
drm/i915: Apply i830 errata for cursor alignment
drm/i915: Only update i845/i865 CURBASE when disabled (v2)
drm/i915: FBC is updated within set_base() so remove second call in mode_set()
...
Diffstat (limited to 'arch/arm/mach-s5pv210/mach-aquila.c')
0 files changed, 0 insertions, 0 deletions