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| author | Kukjin Kim <kgene.kim@samsung.com> | 2010-08-06 14:34:55 +0200 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2010-08-06 14:34:55 +0200 |
| commit | f2b7e3c54a304677a1142829fb5913595885379f (patch) | |
| tree | 1eb941524c7325672f947dab525d96228b362e20 /arch/arm/mach-s5pv210/mach-aquila.c | |
| parent | Merge branch 'next-s5pv310' into for-next (diff) | |
| parent | ARM: S5P: Add s5p_reset_hook() for perform reset using SWRESET on S5P SoCs (diff) | |
| download | linux-f2b7e3c54a304677a1142829fb5913595885379f.tar.xz linux-f2b7e3c54a304677a1142829fb5913595885379f.zip | |
Merge branch 'next-s5p' into for-next
Conflicts:
arch/arm/mach-s5pv210/mach-aquila.c
arch/arm/mach-s5pv210/mach-goni.c
Diffstat (limited to 'arch/arm/mach-s5pv210/mach-aquila.c')
| -rw-r--r-- | arch/arm/mach-s5pv210/mach-aquila.c | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c index 0c894010e278..a6b4ed364840 100644 --- a/arch/arm/mach-s5pv210/mach-aquila.c +++ b/arch/arm/mach-s5pv210/mach-aquila.c @@ -38,52 +38,52 @@ #include <plat/sdhci.h> /* Following are default values for UCON, ULCON and UFCON UART registers */ -#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ +#define AQUILA_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ S3C2410_UCON_RXILEVEL | \ S3C2410_UCON_TXIRQMODE | \ S3C2410_UCON_RXIRQMODE | \ S3C2410_UCON_RXFIFO_TOI | \ S3C2443_UCON_RXERR_IRQEN) -#define S5PV210_ULCON_DEFAULT S3C2410_LCON_CS8 +#define AQUILA_ULCON_DEFAULT S3C2410_LCON_CS8 -#define S5PV210_UFCON_DEFAULT S3C2410_UFCON_FIFOMODE +#define AQUILA_UFCON_DEFAULT S3C2410_UFCON_FIFOMODE static struct s3c2410_uartcfg aquila_uartcfgs[] __initdata = { [0] = { .hwport = 0, .flags = 0, - .ucon = S5PV210_UCON_DEFAULT, - .ulcon = S5PV210_ULCON_DEFAULT, + .ucon = AQUILA_UCON_DEFAULT, + .ulcon = AQUILA_ULCON_DEFAULT, /* * Actually UART0 can support 256 bytes fifo, but aquila board * supports 128 bytes fifo because of initial chip bug */ - .ufcon = S5PV210_UFCON_DEFAULT | + .ufcon = AQUILA_UFCON_DEFAULT | S5PV210_UFCON_TXTRIG128 | S5PV210_UFCON_RXTRIG128, }, [1] = { .hwport = 1, .flags = 0, - .ucon = S5PV210_UCON_DEFAULT, - .ulcon = S5PV210_ULCON_DEFAULT, - .ufcon = S5PV210_UFCON_DEFAULT | + .ucon = AQUILA_UCON_DEFAULT, + .ulcon = AQUILA_ULCON_DEFAULT, + .ufcon = AQUILA_UFCON_DEFAULT | S5PV210_UFCON_TXTRIG64 | S5PV210_UFCON_RXTRIG64, }, [2] = { .hwport = 2, .flags = 0, - .ucon = S5PV210_UCON_DEFAULT, - .ulcon = S5PV210_ULCON_DEFAULT, - .ufcon = S5PV210_UFCON_DEFAULT | + .ucon = AQUILA_UCON_DEFAULT, + .ulcon = AQUILA_ULCON_DEFAULT, + .ufcon = AQUILA_UFCON_DEFAULT | S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16, }, [3] = { .hwport = 3, .flags = 0, - .ucon = S5PV210_UCON_DEFAULT, - .ulcon = S5PV210_ULCON_DEFAULT, - .ufcon = S5PV210_UFCON_DEFAULT | + .ucon = AQUILA_UCON_DEFAULT, + .ulcon = AQUILA_ULCON_DEFAULT, + .ufcon = AQUILA_UFCON_DEFAULT | S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16, }, }; |