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authorBarry Song <Baohua.Song@csr.com>2011-09-30 15:43:12 +0200
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-10-17 10:11:51 +0200
commit91c2ebb90b1890abc648ba9dec5608cbc97e1cb9 (patch)
treeb9f9934aa1b17f3529d2c6423cfacc54bb626724 /arch/arm/mach-s5pv210
parentARM: 7023/1: L2x0: Add interrupts property to OF binding (diff)
downloadlinux-91c2ebb90b1890abc648ba9dec5608cbc97e1cb9.tar.xz
linux-91c2ebb90b1890abc648ba9dec5608cbc97e1cb9.zip
ARM: 7114/1: cache-l2x0: add resume entry for l2 in secure mode
we save the l2x0 registers at the first initialization, and platform codes can get them to restore l2x0 status after wakeup. Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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