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author | Lennert Buytenhek <buytenh@wantstofly.org> | 2008-07-14 14:29:40 +0200 |
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committer | Lennert Buytenhek <buytenh@marvell.com> | 2008-07-24 06:22:59 +0200 |
commit | 81600eea98789da09a32de69ca9d3be8b9503c54 (patch) | |
tree | ba607eed9bfff70d4f40c3b25baf1bc83ea90024 /arch/arm/mach-sa1100/cpu-sa1100.c | |
parent | mv643xx_eth: print driver version on init (diff) | |
download | linux-81600eea98789da09a32de69ca9d3be8b9503c54.tar.xz linux-81600eea98789da09a32de69ca9d3be8b9503c54.zip |
mv643xx_eth: use auto phy polling for configuring (R)(G)MII interface
The mv643xx_eth hardware has a provision for polling the PHY's
MII management registers to obtain the (R)(G)MII interface speed
(10/100/1000) and duplex (half/full) and pause (off/symmetric)
settings to use to talk to the PHY.
The driver currently does not make use of this feature. Instead,
whenever there is a link status change event, it reads the current
link parameters from the PHY, and programs those parameters into
the mv643xx_eth MAC by hand.
This patch switches the mv643xx_eth driver to letting the MAC
auto-determine the (R)(G)MII link parameters by PHY polling, if there
is a PHY present. For PHYless ports (when e.g. the (R)(G)MII
interface is connected to a hardware switch), we keep hardcoding the
MII interface parameters.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Diffstat (limited to 'arch/arm/mach-sa1100/cpu-sa1100.c')
0 files changed, 0 insertions, 0 deletions