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authorRussell King <rmk+kernel@arm.linux.org.uk>2012-01-16 10:31:47 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2012-02-09 16:34:14 +0100
commit6ad1b614007c556129989b9f6b020d0d2e058121 (patch)
treed146b694cad7d3134b3166f56f401b203e073811 /arch/arm/mach-sa1100
parentARM: sa11x0: neponset: fix interrupt setup (diff)
downloadlinux-6ad1b614007c556129989b9f6b020d0d2e058121.tar.xz
linux-6ad1b614007c556129989b9f6b020d0d2e058121.zip
ARM: sa11x0: neponset: provide function to manipulate NCR_0
Rather than having direct register accesses to NCR_0 scattered amongst the code, provide a function instead. This contains the necessary race protection for this platform, ensuring that updates to this register are safe. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-sa1100')
-rw-r--r--arch/arm/mach-sa1100/include/mach/neponset.h4
-rw-r--r--arch/arm/mach-sa1100/neponset.c9
2 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/mach-sa1100/include/mach/neponset.h b/arch/arm/mach-sa1100/include/mach/neponset.h
index ffe2bc45eed0..6032216e1830 100644
--- a/arch/arm/mach-sa1100/include/mach/neponset.h
+++ b/arch/arm/mach-sa1100/include/mach/neponset.h
@@ -71,4 +71,8 @@
#define NCR_A0VPP (1<<5)
#define NCR_A1VPP (1<<6)
+void neponset_ncr_frob(unsigned int, unsigned int);
+#define neponset_ncr_set(v) neponset_ncr_frob(0, v)
+#define neponset_ncr_clear(v) neponset_ncr_frob(v, 0)
+
#endif
diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c
index 6a14d3760ccd..10be07e2bd56 100644
--- a/arch/arm/mach-sa1100/neponset.c
+++ b/arch/arm/mach-sa1100/neponset.c
@@ -20,6 +20,15 @@
#include <asm/hardware/sa1111.h>
#include <asm/sizes.h>
+void neponset_ncr_frob(unsigned int mask, unsigned int val)
+{
+ unsigned long flags;
+
+ local_irq_save(flags);
+ NCR_0 = (NCR_0 & ~mask) | val;
+ local_irq_restore(flags);
+}
+
/*
* Install handler for Neponset IRQ. Note that we have to loop here
* since the ETHERNET and USAR IRQs are level based, and we need to