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| author | Simon Arlott <simon@fire.lp0.eu> | 2007-05-11 21:40:30 +0200 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-05-20 21:10:32 +0200 |
| commit | 6cbdc8c5357276307a77deeada3f04626ff17da6 (patch) | |
| tree | e0a4190d816fa4efb6ddb331b859bf0d5eb9c1a3 /arch/arm/mach-sa1100 | |
| parent | [ARM] at91_adc parenthesis balance (diff) | |
| download | linux-6cbdc8c5357276307a77deeada3f04626ff17da6.tar.xz linux-6cbdc8c5357276307a77deeada3f04626ff17da6.zip | |
[ARM] spelling fixes
Spelling fixes in arch/arm/.
Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-sa1100')
| -rw-r--r-- | arch/arm/mach-sa1100/time.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c index 416e277054c2..29cb0c1604ab 100644 --- a/arch/arm/mach-sa1100/time.c +++ b/arch/arm/mach-sa1100/time.c @@ -25,7 +25,7 @@ static unsigned long __init sa1100_get_rtc_time(void) { /* * According to the manual we should be able to let RTTR be zero - * and then a default diviser for a 32.768KHz clock is used. + * and then a default divisor for a 32.768KHz clock is used. * Apparently this doesn't work, at least for my SA1110 rev 5. * If the clock divider is uninitialized then reset it to the * default value to get the 1Hz clock. |