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| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-03-19 13:16:36 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-05-30 01:50:02 +0200 |
| commit | 2edb89cd8e915d2d826f5704b80da28bde688051 (patch) | |
| tree | 569f8000d9d528e274f108b31ea14cd0e9c3b188 /arch/arm/mach-shmobile/board-kzm9g-reference.c | |
| parent | ARM: l2c: rockchip: convert to generic l2c OF initialisation (diff) | |
| download | linux-2edb89cd8e915d2d826f5704b80da28bde688051.tar.xz linux-2edb89cd8e915d2d826f5704b80da28bde688051.zip | |
ARM: l2c: shmobile: remove cache size override
The cache size should already be present in the L2 cache auxiliary
control register: it is part of the integration process to configure
the hardware IP. Most platforms get this right, yet still many
cargo-cult program, and assume that they always need specifying to
the L2 cache code. Remove them so we can find out which really need
this.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-shmobile/board-kzm9g-reference.c')
| -rw-r--r-- | arch/arm/mach-shmobile/board-kzm9g-reference.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-shmobile/board-kzm9g-reference.c b/arch/arm/mach-shmobile/board-kzm9g-reference.c index 85873f186d77..a735a1d80c28 100644 --- a/arch/arm/mach-shmobile/board-kzm9g-reference.c +++ b/arch/arm/mach-shmobile/board-kzm9g-reference.c @@ -37,7 +37,7 @@ static void __init kzm_init(void) #ifdef CONFIG_CACHE_L2X0 /* Shared attribute override enable, 64K*8way */ - l2x0_init(IOMEM(0xf0100000), 0x00460000, 0xc2000fff); + l2x0_init(IOMEM(0xf0100000), 0x00400000, 0xc20f0fff); #endif } |