diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2012-09-14 22:08:08 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2012-09-18 10:15:11 +0200 |
| commit | 0a4b04dc299dfb691827a4001b3d8d7e443b71c9 (patch) | |
| tree | 8f8aaabd715306eac4a814cdfd73ef9059f16fea /arch/arm/mach-shmobile/clock-sh7367.c | |
| parent | Linux 3.6-rc4 (diff) | |
| download | linux-0a4b04dc299dfb691827a4001b3d8d7e443b71c9.tar.xz linux-0a4b04dc299dfb691827a4001b3d8d7e443b71c9.zip | |
ARM: shmobile: use __iomem pointers for MMIO
ARM is moving to stricter checks on readl/write functions,
so we need to use the correct types everywhere.
This patch is a bit ugly for shmobile, which is the only platform
that just uses integer literals all over the place, but I can't
see a better way to do this.
Acked-by: Simon Horman <horms@verge.net.au>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: linux-sh@vger.kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-shmobile/clock-sh7367.c')
| -rw-r--r-- | arch/arm/mach-shmobile/clock-sh7367.c | 44 |
1 files changed, 22 insertions, 22 deletions
diff --git a/arch/arm/mach-shmobile/clock-sh7367.c b/arch/arm/mach-shmobile/clock-sh7367.c index 162b791b8984..ef0a95e592c4 100644 --- a/arch/arm/mach-shmobile/clock-sh7367.c +++ b/arch/arm/mach-shmobile/clock-sh7367.c @@ -24,28 +24,28 @@ #include <mach/common.h> /* SH7367 registers */ -#define RTFRQCR 0xe6150000 -#define SYFRQCR 0xe6150004 -#define CMFRQCR 0xe61500E0 -#define VCLKCR1 0xe6150008 -#define VCLKCR2 0xe615000C -#define VCLKCR3 0xe615001C -#define SCLKACR 0xe6150010 -#define SCLKBCR 0xe6150014 -#define SUBUSBCKCR 0xe6158080 -#define SPUCKCR 0xe6150084 -#define MSUCKCR 0xe6150088 -#define MVI3CKCR 0xe6150090 -#define VOUCKCR 0xe6150094 -#define MFCK1CR 0xe6150098 -#define MFCK2CR 0xe615009C -#define PLLC1CR 0xe6150028 -#define PLLC2CR 0xe615002C -#define RTMSTPCR0 0xe6158030 -#define RTMSTPCR2 0xe6158038 -#define SYMSTPCR0 0xe6158040 -#define SYMSTPCR2 0xe6158048 -#define CMMSTPCR0 0xe615804c +#define RTFRQCR IOMEM(0xe6150000) +#define SYFRQCR IOMEM(0xe6150004) +#define CMFRQCR IOMEM(0xe61500E0) +#define VCLKCR1 IOMEM(0xe6150008) +#define VCLKCR2 IOMEM(0xe615000C) +#define VCLKCR3 IOMEM(0xe615001C) +#define SCLKACR IOMEM(0xe6150010) +#define SCLKBCR IOMEM(0xe6150014) +#define SUBUSBCKCR IOMEM(0xe6158080) +#define SPUCKCR IOMEM(0xe6150084) +#define MSUCKCR IOMEM(0xe6150088) +#define MVI3CKCR IOMEM(0xe6150090) +#define VOUCKCR IOMEM(0xe6150094) +#define MFCK1CR IOMEM(0xe6150098) +#define MFCK2CR IOMEM(0xe615009C) +#define PLLC1CR IOMEM(0xe6150028) +#define PLLC2CR IOMEM(0xe615002C) +#define RTMSTPCR0 IOMEM(0xe6158030) +#define RTMSTPCR2 IOMEM(0xe6158038) +#define SYMSTPCR0 IOMEM(0xe6158040) +#define SYMSTPCR2 IOMEM(0xe6158048) +#define CMMSTPCR0 IOMEM(0xe615804c) /* Fixed 32 KHz root clock from EXTALR pin */ static struct clk r_clk = { |