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authorLinus Torvalds <torvalds@linux-foundation.org>2017-02-24 00:33:54 +0100
committerLinus Torvalds <torvalds@linux-foundation.org>2017-02-24 00:33:54 +0100
commit6ae52c65e01991426e87bb0fb8a2ac9e032db7b1 (patch)
tree04b51ff1b9c175a115c3db9aacf210092e521179 /arch/arm/mach-shmobile/platsmp-apmu.c
parentMerge tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/... (diff)
parentMerge tag 'davinci-for-v4.11/soc-2' of git://git.kernel.org/pub/scm/linux/ker... (diff)
downloadlinux-6ae52c65e01991426e87bb0fb8a2ac9e032db7b1.tar.xz
linux-6ae52c65e01991426e87bb0fb8a2ac9e032db7b1.zip
Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Arnd Bergmann: "In the SoC branch we normally collect classic arch/arm/mach-* contents, i.e. C code changes for SoC platforms. This release cycle the diffstat is quite nice, in that we're removing 3x the amount of code that's being added. The main reason for this is that there's a removal of camera drivers for Freescale i.MX chips (driver was removed so the device registration isn't needed any more). There's also removal of display initialization code for OMAP that is no longer needed. The rest are mostly minor tweaks and cleanups; constification on Samsung platforms, cleanup of ux500 platform data, purge of other unused platform data/device seutp on i.MX and other good stuff. New SoC support this cycle is for two Allwinner platforms, H2+ and V3s" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (55 commits) ARM: ux500: remove deleted file from Makefile ARM: ep93xx: Disable TS-72xx watchdog before uncompressing ARM: ux500: cut some platform data MAINTAINERS: Update for the current location of the bcm2835 tree. ARM: davinci: remove BUG_ON() from da850_register_sata() ARM: davinci: da850: model the SATA refclk ARM: davinci: da850: add con_id for the SATA clock ARM: davinci: da8xx-dt: add OF_DEV_AUXDATA entry for SATA arm: mvebu: support for SMP on 98DX3336 SoC dt-bindings: video: exynos7-decon: Remove obsolete samsung,power-domain property soc: dove: constify reset_control_ops structures ARM: mv78xx0: fix possible PCI buffer overflow MAINTAINERS: transfer maintainership for the EZX platform ARM: shmobile: rcar-gen2: Add more register documentation ARM: tegra: paz00: Fix __initdata placement ARM: OMAP: clock: Remove unused mpurate cmdline option ARM: davinci: add skeleton for pdata-quirks arm: sunxi: add support for V3s SoC ARM: OMAP2+: omap_hwmod: Add support for earlycon arm: hisi: drop extern hip01_cpu_die ...
Diffstat (limited to 'arch/arm/mach-shmobile/platsmp-apmu.c')
-rw-r--r--arch/arm/mach-shmobile/platsmp-apmu.c41
1 files changed, 24 insertions, 17 deletions
diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c
index 0c6bb458b7a4..e19266844e16 100644
--- a/arch/arm/mach-shmobile/platsmp-apmu.c
+++ b/arch/arm/mach-shmobile/platsmp-apmu.c
@@ -31,9 +31,21 @@ static struct {
int bit;
} apmu_cpus[NR_CPUS];
-#define WUPCR_OFFS 0x10
-#define PSTR_OFFS 0x40
-#define CPUNCR_OFFS(n) (0x100 + (0x10 * (n)))
+#define WUPCR_OFFS 0x10 /* Wake Up Control Register */
+#define PSTR_OFFS 0x40 /* Power Status Register */
+#define CPUNCR_OFFS(n) (0x100 + (0x10 * (n)))
+ /* CPUn Power Status Control Register */
+#define DBGRCR_OFFS 0x180 /* Debug Resource Reset Control Reg. */
+
+/* Power Status Register */
+#define CPUNST(r, n) (((r) >> (n * 4)) & 3) /* CPUn Status Bit */
+#define CPUST_RUN 0 /* Run Mode */
+#define CPUST_STANDBY 3 /* CoreStandby Mode */
+
+/* Debug Resource Reset Control Register */
+#define DBGCPUREN BIT(24) /* CPU Other Reset Request Enable */
+#define DBGCPUNREN(n) BIT((n) + 20) /* CPUn Reset Request Enable */
+#define DBGCPUPREN BIT(19) /* CPU Peripheral Reset Req. Enable */
static int __maybe_unused apmu_power_on(void __iomem *p, int bit)
{
@@ -59,7 +71,7 @@ static int __maybe_unused apmu_power_off_poll(void __iomem *p, int bit)
int k;
for (k = 0; k < 1000; k++) {
- if (((readl_relaxed(p + PSTR_OFFS) >> (bit * 4)) & 0x03) == 3)
+ if (CPUNST(readl_relaxed(p + PSTR_OFFS), bit) == CPUST_STANDBY)
return 1;
mdelay(1);
@@ -78,6 +90,8 @@ static int __maybe_unused apmu_wrap(int cpu, int (*fn)(void __iomem *p, int cpu)
#ifdef CONFIG_SMP
static void apmu_init_cpu(struct resource *res, int cpu, int bit)
{
+ u32 x;
+
if ((cpu >= ARRAY_SIZE(apmu_cpus)) || apmu_cpus[cpu].iomem)
return;
@@ -85,6 +99,11 @@ static void apmu_init_cpu(struct resource *res, int cpu, int bit)
apmu_cpus[cpu].bit = bit;
pr_debug("apmu ioremap %d %d %pr\n", cpu, bit, res);
+
+ /* Setup for debug mode */
+ x = readl(apmu_cpus[cpu].iomem + DBGRCR_OFFS);
+ x |= DBGCPUREN | DBGCPUNREN(bit) | DBGCPUPREN;
+ writel(x, apmu_cpus[cpu].iomem + DBGRCR_OFFS);
}
static void apmu_parse_cfg(void (*fn)(struct resource *res, int cpu, int bit),
@@ -197,21 +216,9 @@ static void __init shmobile_smp_apmu_prepare_cpus_dt(unsigned int max_cpus)
rcar_gen2_pm_init();
}
-static int shmobile_smp_apmu_boot_secondary_md21(unsigned int cpu,
- struct task_struct *idle)
-{
- /* Error out when hardware debug mode is enabled */
- if (rcar_gen2_read_mode_pins() & BIT(21)) {
- pr_warn("Unable to boot CPU%u when MD21 is set\n", cpu);
- return -ENOTSUPP;
- }
-
- return shmobile_smp_apmu_boot_secondary(cpu, idle);
-}
-
static struct smp_operations apmu_smp_ops __initdata = {
.smp_prepare_cpus = shmobile_smp_apmu_prepare_cpus_dt,
- .smp_boot_secondary = shmobile_smp_apmu_boot_secondary_md21,
+ .smp_boot_secondary = shmobile_smp_apmu_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU
.cpu_can_disable = shmobile_smp_cpu_can_disable,
.cpu_die = shmobile_smp_apmu_cpu_die,