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| author | Michal Simek <monstr@monstr.eu> | 2012-03-30 12:10:03 +0200 |
|---|---|---|
| committer | Michal Simek <monstr@monstr.eu> | 2012-03-30 12:10:03 +0200 |
| commit | 6a4770e335bd4df0a4577146f76e116ab6e23f40 (patch) | |
| tree | 305056c20b6ccf3a4fed00e9e32f3a1dd039cd70 /arch/arm/mach-shmobile/smp-r8a7779.c | |
| parent | microblaze: Fix stack usage in PAGE_SIZE copy_tofrom_user (diff) | |
| parent | Merge tag 'sh-for-linus' of git://github.com/pmundt/linux-sh (diff) | |
| download | linux-6a4770e335bd4df0a4577146f76e116ab6e23f40.tar.xz linux-6a4770e335bd4df0a4577146f76e116ab6e23f40.zip | |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6 into next
Diffstat (limited to 'arch/arm/mach-shmobile/smp-r8a7779.c')
| -rw-r--r-- | arch/arm/mach-shmobile/smp-r8a7779.c | 12 |
1 files changed, 5 insertions, 7 deletions
diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c index 4fe2e9eaf501..b62e19d4c9af 100644 --- a/arch/arm/mach-shmobile/smp-r8a7779.c +++ b/arch/arm/mach-shmobile/smp-r8a7779.c @@ -30,7 +30,7 @@ #include <asm/smp_twd.h> #include <asm/hardware/gic.h> -#define AVECR 0xfe700040 +#define AVECR IOMEM(0xfe700040) static struct r8a7779_pm_ch r8a7779_ch_cpu1 = { .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */ @@ -64,6 +64,8 @@ static void __iomem *scu_base_addr(void) static DEFINE_SPINLOCK(scu_lock); static unsigned long tmp; +static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29); + static void modify_scu_cpu_psr(unsigned long set, unsigned long clr) { void __iomem *scu_base = scu_base_addr(); @@ -82,11 +84,7 @@ unsigned int __init r8a7779_get_core_count(void) { void __iomem *scu_base = scu_base_addr(); -#ifdef CONFIG_HAVE_ARM_TWD - /* twd_base needs to be initialized before percpu_timer_setup() */ - twd_base = (void __iomem *)0xf0000600; -#endif - + shmobile_twd_init(&twd_local_timer); return scu_get_core_count(scu_base); } @@ -140,7 +138,7 @@ void __init r8a7779_smp_prepare_cpus(void) scu_enable(scu_base_addr()); /* Map the reset vector (in headsmp.S) */ - __raw_writel(__pa(shmobile_secondary_vector), __io(AVECR)); + __raw_writel(__pa(shmobile_secondary_vector), AVECR); /* enable cache coherency on CPU0 */ modify_scu_cpu_psr(0, 3 << (cpu * 8)); |